Gigabyte G492-ZD0 User Manual page 83

Hpc server - 4u dp sxm4 a100 8 gpu server
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Parameter
Memory MBIST
Description
Press [Enter] for more options
MBIST Enable
Š
– Enable or disable Memory MBIST.
– Options available: Disabled/Enabled. Default option is Disabled.
Data Eye
Š
– Press [Enter] for more options.
• Pattern Select
• Pattern Length
• Aggressor Channel
• Aggressor Static Lane Control
• Aggressor Static Lane Select Upper 32 bits
• Aggressor Static Lane Select Lower 32 bits
• Aggressor Static Lane Select ECC
• Aggressor Static Lane Value
• Target Static Lane Control
• Target Static Lane Select Upper 32 bits
• Target Static Lane Select Lower 32 bits
• Target Static Lane Select ECC
• Target Static Lane Value
• Data Eye Type
• Worst Case Margin Granularity
• Read Voltage Sweep Step Size
• Read Timing Sweep Step Size
• Write Voltage Sweep Step Size
• Write Timing Sweep Step Size
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BIOS Setup

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