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INITIAL/LOGO
X
X
X' TAL
XALE
X ADDRESS LATCH ENABLE
XAREQ
X AUDIO DATA REQUEST
XCDROM
X CD ROM CHIP SELECT
XCS
X CHIP SELECT
XCSYNC
X COMPOSITE SYNC
XDS
X DATA STROBE
XHSYNCO
X HORIZONTAL SYNC OUTPUT
XHINT
XH INTERRUPTREQUEST
XI
X' TAL OSCILLATOR INPUT
XINT
X INTERRUPT
XMW
X MEMORY WRITE ENABLE
XO
X' TAL OSCILLATOR OUTPUT
XRE
X READ ENABLE
XSRMCE
X SRAM CHIP ENABLE
XSRMOE
X SRAM OUTPUT ENABLE
XSRMWE
X SRAM WRITE ENABLE
XVCS
X V-DEC CHIPSELECT
XVDS
X V-DEC CONTROL BUS
STROBE
XVSYNCO
X VERTICAL SYNC OUTPUT
13. Voltage Chart
13.1. Power P.C.B.
13.2. Terminal P.C.B.
13.3. Module P.C.B.
13.4. Intermediate P.C.B.
13.5. FRONT 1 P.C.B.
14. BLOCK DIAGRAM
14.1. OVERALL BLOCK DIAGRAM
14.2. POWER BLOCK DIAGRAM
14.3. SERVO BLOCK DIAGRAM
14.4. VIDEO BLOCK DIAGRAM
14.5. AUDIO BLOCK DIAGRAM
ABBREVIATIONS
52
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