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LG 42PJ560R Service Manual page 20

Chassis : pp01c

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EAX61377101(BPR)
H6 Revolution Circuit Diagram
Main Flash Memory
IC402
W25X64VSFIG
+3.3V_MST
HOLD
CLK
1
16
SPI_CLK
C400
0.01uF
VCC
DIO
25V
2
15
SPI_DI
NC_1
NC_8
3
14
NC_2
NC_7
4
13
NC_3
NC_6
+3.3V_MST
5
12
NC_4
NC_5
6
11
R401
+3.3V_MST
4.7K
SPI_CZ
CS
GND
R411
7
10
4.7K
SPI_DO
DO
WP
8
9
FLASH_WP
Main EEPROM
IC400
AT24C64CN-SH-T
+3.3V_MST
A0
VCC
1
8
C404
0.01uF
25V
A1
WP
2
7
A2
SCL
3
6
M_SCL
GND
SDA
4
5
M_SDA
HDCP EEPROM
+3.3V_MST
IC401
CAT24WC08W-T
R400
A0
VCC
4.7K
1
8
C402
0.1uF
A1
WP
2
7
R408
100
A2
SCL
3
6
M_SCL
R409
VSS
SDA
100
4
5
M_SDA
Vout Amp
+5V_MULTI
+5V_MULTI
R406
470
E
R488
Q400
EU
30K
EU
EU
C
B
MNT_VOUT_T
C
B
Q401
220
C478
14K
MNT_VOUT
R404
EU
10uF
E
R489
EU
EU
EU
75
R407
EU
GAIN X 4
MStar Reset
C401
0.1uF
+3.3V_MPLL
C403
4.7uF
R410
10V
22
SYS_RESET
D401
R405
KDS181
C405
33K
0.1uF
16V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Main
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
SUB MICOM
+3.3V_MPLL
+3.3V_MST
C409
C411
10uF
0.1uF
+3.3V_MST
SD Divx_NON RM/SRS
RXBCKN
TMDS2_RXC-
1
RXBCKP
1/16W
TMDS2_RXC+
2
10
RXB0N
TMDS2_RX0-
3
AR400
RXB0P
TMDS2_RX0+
4
HOTPLUGB
HPD_MST_2
5
RXB1N
TMDS2_RX1-
6
RXB1P
TMDS2_RX1+
1/16W
7
10
AVDD_33_1
TMDS2_RX2-
8
RXB2N
TMDS2_RX2+
AR401
9
RXB2P
10
RXACKN
TMDS1_RXC-
11
RXACKP
TMDS1_RXC+
1/16W
12
10
RXA0N
TMDS1_RX0-
13
AR402
RXA0P
TMDS1_RX0+
14
AVDD_33_2
15
RXA1N
TMDS1_RX1-
16
1/16W
RXA1P
TMDS1_RX1+
17
GND_1
10
18
TMDS1_RX2-
AR403
RXA2N
TMDS1_RX2+
19
RXA2P
20
HOTPLUGA
HPD_MST_1
21
REXT
22
R436
390
VCLAMP
C410
0.1uF
23
C406
0.1uF
REFP
24
0.1uF
C407
REFM
25
C408
0.1uF
BIN1P
R424
47
C421
0.047uF
26
PC_B
R427
470
C440
1000pF
SOGIN1
Close to IC as close as
PC_G
27
possible with width trace
GIN1P
R425
47
C422
0.047uF
28
RIN1P
R426
47
C423
0.047uF
PC_R
29
R479
EU
0
R415
47
C424
0.047uF
BINM
30
SC1_B
BIN0P
R416
47
C425
0.047uF
31
COMP1_PB
R417
47
C426
0.047uF
GINM
32
R418
47
C427
0.047uF
GIN0P
COMP1_Y
33
SOGIN0
SC1_G
R419
470
C441
1000pF
34
0
R480
EU
R420
47
C428
0.047uF
RINM
35
RIN0P
COMP1_PR
R421
47
C429
0.047uF
36
SC1_R
AVDD_33_3
37
0
R481
EU
GND_2
38
BIN2P
COMP2_PB
R431
47
C430
0.047uF
39
R432
47
C431
0.047uF
GIN2P
COMP2_Y
40
R433
470
C442
SOGIN2
1000pF
41
RIN2P
COMP2_PR
R434
47
C432
0.047uF
42
CVBS6
43
CVBS5
44
CVBS4
R422
47
C433
0.047uF
45
SC1_VIN
R423
47
C434
0.047uF
CVBS3
SIDE_VIN
46
CVBS2
SC2_VIN
R482
47
C473
0.047uF
47
CVBS1
EU
EU
48
R429
47
C435
0.047uF
VCOM1
49
CVBS0
TV_MAIN
R428
47
C436
0.047uF
50
R430
47
C437
0.047uF
VCOM0
51
C413
0.01uF
AVDD_33_4
52
CVBSOUT
53
MNT_VOUT_T
GND_3
54
SIF0P
MAIN_SIF
55
R413
47
C419
0.1uF
SIF0M
56
R412
47
0.1uF
C420
VDDC_1
57
AUL5
SIDE_LIN
58
C417
2.2uF
AUR5
SIDE_RIN
59
C418
2.2uF
AUVRM
60
AUOUTL2
61
MNT_L_AMP
100
R438
AUOUTR2
62
MNT_R_AMP
R437
100
AUOUTL1
63
TV_L_AMP
R483
EU
100
AUOUTR1
64
TV_R_AMP
100
R484
EU
EU
EU
EU
EU
C439
0.1uF
C412
C415
C438
C443
10uF
4.7uF
0.1uF
1000pF
Close to IC
with width trace
+3.3V_MST
+3.3V_MST
20pF
C454
1M
12MHz
R444
X400
20pF
C455
I2S_OUT
25V
0.01uF
C456
5V
3.3V
5V
5V
3.3V
IC403
LGE4767A (Matrix SD Divx_ Non RM_NON SRS_TSMC)
scart RGB INPUT
S-VIDEO
SCART_CVBS
5V
5V
C453
0.01uF
25V
EU
EU
ROM D/L
HDMI_3
RX,TX
DDR2_A[0-12]
V_REF
+1.8V_DDR
25V
0.01uF
+1.2V_MST
C457
B_MCLKZ
192
22
B_MCLK
R471
191
22
B_MDATA[5]
R472
190
B_MDATA[2]
AR414
189
B_MDATA[0]
56
188
B_MDATA[7]
187
AVDD_DDR_5
186
B_MDATA[13]
185
B_MDATA[10]
184
GND_13
AR415
183
B_MDATA[8]
56
182
B_MDATA[15]
181
AVDD_DDR_4
180
B_DDR2_DQSB[1]
179
B_DDR2_DQS[1]
178
GND_12
177
VDDP_4
176
AVDD_DDR_3
175
B_DDR2_DQSB[0]
174
B_DDR2_DQS[0]
173
GND_11
172
B_DDR2_DQM[0]
171
B_DDR2_DQM[1]
170
AVDD_DDR_2
169
B_MDATA[14]
168
B_MDATA[9]
167
GND_10
AR412
166
B_MDATA[12]
56
165
B_MDATA[11]
164
AVDD_DDR_1
163
B_MDATA[6]
162
B_MDATA[1]
161
GND_9
AR413
160
B_MDATA[3]
56
159
B_MDATA[4]
158
VDDC_5
157
VDDP_3
156
GPIO58
3.3V
155
DISP_EN
GPIO57
100
R464
154
5V
100 READY
GPIO56
R465
3.3V
153
ERROR_DET
GPIO55
5V
152
EYE_SCL
PCM
GPIO54
100
R466
151
EYE_SDA
100
GPIO53
R469
150
3.3V
GPIO52
R470 22
149
A_SCL
GPIO51
R467 22
148
A_SDA
GND_8
147
GPIO152/I2C_OUT_SD3
146
M5V_ON
GPIO151/I2C_OUT_SD2
100
R403
145
P_SCL
22
GPIO150/I2C_OUT_MUTE
R447
144
P_SDA
VDDC_4
22
R463
143
GND_7
142
AVDD_LPLL
141
TXCO4+
LVB0M
140
TXCO4-
LVB0P
139
TXCO3+
LVB1M
138
TXCO3-
LVB1P
137
TXCLKO+
LVB2M
136
TXCLKO-
LVB2P
135
TXCO2+
LVBCKM
134
TXCO2-
LVBCKP
133
TXCO1+
LVB3M
132
TXCO1-
LVB3P
131
TXCO0+
LVB4M
130
3.3V
TXCO0-
LVB4P
129
+3.3V_MST
C458
0.01uF
25V
[MODE SELECTION]
+3.3V_MST
HD LVDS
R473
R475
READY
1K
1K
R474
R476
READY
1K
1K
FLASH
H6 R
Main
+1.2V_MST
Close to IC as close as possible
C460
C462
C464
C466
C468
C470
C472
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
25V
25V
25V
25V
25V
25V
25V
+1.8V_DDR
C469
C471
C461
C463
C465
C467
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
Close to IC as close as possible
DDR2_D[0-15]
DDR2_MCLKZ
DDR2_MCLK
DDR2_D[5]
DDR2_D[2]
DDR2_D[0]
DDR2_D[7]
DDR2_D[13]
DDR2_D[10]
DDR2_D[8]
DDR2_D[15]
MATRIX_ONLY MP3
RXBCKN
B_MCLKZ
RXBCKP
1
192
B_MCLK
DDR2_DQS1M
2
191
RXB0N
3
190
B_MDATA[5]
RXB0P
4
189
B_MDATA[2]
HOTPLUGB
B_MDATA[0]
DDR2_DQS1P
5
188
RXB1N
6
187
B_MDATA[7]
RXB1P
7
186
AVDD_DDR_5
AVDD_33_1
B_MDATA[13]
8
185
RXB2N
9
184
B_MDATA[10]
RXB2P
10
183
GND_13
RXACKN
B_MDATA[8]
11
182
RXACKP
12
181
B_MDATA[15]
RXA0N
13
180
AVDD_DDR_4
RXA0P
B_DDR2_DQSB[1]
14
179
AVDD_33_2
15
178
B_DDR2_DQS[1]
RXA1N
16
177
GND_12
RXA1P
17
176
VDDP_4
GND_1
AVDD_DDR_3
18
175
DDR2_DQS0M
RXA2N
19
174
B_DDR2_DQSB[0]
RXA2P
20
173
B_DDR2_DQS[0]
HOTPLUGA
GND_11
21
172
DDR2_DQS0P
REXT
22
171
B_DDR2_DQM[0]
VCLAMP
23
170
B_DDR2_DQM[1]
REFP
AVDD_DDR_2
24
169
REFM
25
168
B_MDATA[14]
BIN1P
26
167
B_MDATA[9]
SOGIN1
GND_10
27
166
GIN1P
28
165
B_MDATA[12]
DDR2_DQM0
RIN1P
29
164
B_MDATA[11]
BINM
AVDD_DDR_1
30
163
BIN0P
31
162
B_MDATA[6]
DDR2_DQM1
GINM
32
IC403-*1
161
B_MDATA[1]
GIN0P
33
160
GND_9
SOGIN0
B_MDATA[3]
34
159
RINM
35
158
B_MDATA[4]
RIN0P
36
157
VDDC_5
AVDD_33_3
VDDP_3
37
156
GND_2
38
155
GPIO58
BIN2P
39
154
GPIO57
GIN2P
GPIO56
40
153
DDR2_D[14]
SOGIN2
41
152
GPIO55
RIN2P
42
151
GPIO54
CVBS6
GPIO53
43
150
CVBS5
44
149
GPIO52
DDR2_D[9]
CVBS4
45
148
GPIO51
CVBS3
46
GND_8
CVBS2
147
GPIO152/I2C_OUT_SD3
47
146
DDR2_D[12]
CVBS1
48
145
GPIO151/I2C_OUT_SD2
VCOM1
49
144
GPIO150/I2C_OUT_MUTE
CVBS0
VDDC_4
50
143
DDR2_D[11]
VCOM0
51
142
GND_7
AVDD_33_4
52
141
AVDD_LPLL
CVBSOUT
LVB0M
53
140
GND_3
54
139
LVB0P
SIF0P
55
138
LVB1M
SIF0M
LVB1P
56
137
VDDC_1
57
136
LVB2M
AUL5
58
135
LVB2P
AUR5
LVBCKM
59
134
AUVRM
60
133
LVBCKP
AUOUTL2
61
132
LVB3M
DDR2_D[6]
AUOUTR2
62
131
LVB3P
AUOUTL1
LVB4M
63
130
AUOUTR1
64
129
LVB4P
DDR2_D[1]
DDR2_D[3]
DDR2_D[4]
LGE4766A (Matrix Only MP3_NON SRS_TSMC)
+3.3V_MST
R478
4.7K
MATRIX BASIC
RXBCKN
B_MCLKZ
1
192
RXBCKP
2
191
B_MCLK
R477
4.7K
RXB0N
3
190
B_MDATA[5]
RXB0P
B_MDATA[2]
4
189
HOTPLUGB
5
188
B_MDATA[0]
RXB1N
6
187
B_MDATA[7]
RXB1P
AVDD_DDR_5
7
186
AVDD_33_1
8
185
B_MDATA[13]
RXB2N
9
184
B_MDATA[10]
RXB2P
GND_13
RXACKN
10
183
B_MDATA[8]
+3.3V_MST
11
182
RXACKP
12
181
B_MDATA[15]
RXA0N
13
180
AVDD_DDR_4
R468
4.7K
RXA0P
B_DDR2_DQSB[1]
14
179
AVDD_33_2
15
178
B_DDR2_DQS[1]
RXA1N
16
177
GND_12
RXA1P
VDDP_4
R487
4.7K
17
176
GND_1
18
175
AVDD_DDR_3
RXA2N
19
174
B_DDR2_DQSB[0]
RXA2P
B_DDR2_DQS[0]
20
173
HOTPLUGA
21
172
GND_11
REXT
22
171
B_DDR2_DQM[0]
VCLAMP
B_DDR2_DQM[1]
23
170
REFP
24
169
AVDD_DDR_2
REFM
25
168
B_MDATA[14]
BIN1P
26
167
B_MDATA[9]
SOGIN1
GND_10
27
166
GIN1P
28
165
B_MDATA[12]
RIN1P
29
164
B_MDATA[11]
BINM
AVDD_DDR_1
30
163
BIN0P
31
IC403-*2
162
B_MDATA[6]
GINM
32
161
B_MDATA[1]
GIN0P
GND_9
33
160
SOGIN0
34
159
B_MDATA[3]
RINM
35
158
B_MDATA[4]
RIN0P
VDDC_5
36
157
AVDD_33_3
37
156
VDDP_3
GND_2
38
155
GPIO58
BIN2P
GPIO57
39
154
GIN2P
40
153
GPIO56
SOGIN2
41
152
GPIO55
RIN2P
42
151
GPIO54
CVBS6
GPIO53
43
150
CVBS5
44
149
GPIO52
CVBS4
45
148
GPIO51
CVBS3
GND_8
46
147
CVBS2
47
146
GPIO152/I2C_OUT_SD3
CVBS1
48
145
GPIO151/I2C_OUT_SD2
VCOM1
GPIO150/I2C_OUT_MUTE
49
144
CVBS0
50
143
VDDC_4
VCOM0
51
142
GND_7
AVDD_33_4
AVDD_LPLL
52
141
CVBSOUT
53
140
LVB0M
GND_3
54
139
LVB0P
SIF0P
55
LVB1M
SIF0M
138
LVB1P
56
137
VDDC_1
57
136
LVB2M
AUL5
58
135
LVB2P
AUR5
LVBCKM
59
134
AUVRM
60
133
LVBCKP
AUOUTL2
61
132
LVB3M
AUOUTR2
LVB3P
62
131
AUOUTL1
63
130
LVB4M
AUOUTR1
64
129
LVB4P
LGE4765A (Matrix basic_NON_SRS_TSMC)
MATRIX_SD DIVX_RM
RXBCKN
B_MCLKZ
1
192
RXBCKP
2
191
B_MCLK
RXB0N
3
190
B_MDATA[5]
RXB0P
B_MDATA[2]
4
189
HOTPLUGB
5
188
B_MDATA[0]
RXB1N
6
187
B_MDATA[7]
RXB1P
7
186
AVDD_DDR_5
AVDD_33_1
B_MDATA[13]
8
185
RXB2N
9
184
B_MDATA[10]
RXB2P
10
183
GND_13
RXACKN
B_MDATA[8]
11
182
RXACKP
12
181
B_MDATA[15]
RXA0N
13
180
AVDD_DDR_4
RXA0P
B_DDR2_DQSB[1]
14
179
AVDD_33_2
15
178
B_DDR2_DQS[1]
RXA1N
16
177
GND_12
RXA1P
VDDP_4
17
176
GND_1
18
175
AVDD_DDR_3
RXA2N
19
174
B_DDR2_DQSB[0]
RXA2P
B_DDR2_DQS[0]
20
173
HOTPLUGA
21
172
GND_11
REXT
22
171
B_DDR2_DQM[0]
VCLAMP
23
170
B_DDR2_DQM[1]
REFP
AVDD_DDR_2
24
169
REFM
25
168
B_MDATA[14]
BIN1P
26
167
B_MDATA[9]
SOGIN1
GND_10
27
166
GIN1P
28
165
B_MDATA[12]
RIN1P
29
164
B_MDATA[11]
BINM
AVDD_DDR_1
30
163
BIN0P
31
162
B_MDATA[6]
GINM
32
IC403-*3
161
B_MDATA[1]
GIN0P
GND_9
33
160
SOGIN0
34
159
B_MDATA[3]
RINM
35
158
B_MDATA[4]
RIN0P
VDDC_5
AVDD_33_3
36
157
37
156
VDDP_3
GND_2
38
155
GPIO58
BIN2P
39
154
GPIO57
GIN2P
GPIO56
40
153
SOGIN2
41
152
GPIO55
RIN2P
42
151
GPIO54
CVBS6
GPIO53
43
150
CVBS5
44
149
GPIO52
CVBS4
45
148
GPIO51
CVBS3
GND_8
46
147
CVBS2
47
146
GPIO152/I2C_OUT_SD3
BUZZ_PWM
CVBS1
48
145
GPIO151/I2C_OUT_SD2
VCOM1
GPIO150/I2C_OUT_MUTE
49
144
CVBS0
50
143
VDDC_4
VCOM0
51
142
GND_7
AVDD_33_4
52
141
AVDD_LPLL
CVBSOUT
LVB0M
53
140
GND_3
54
139
LVB0P
SIF0P
55
138
LVB1M
SIF0M
LVB1P
56
137
VDDC_1
57
136
LVB2M
AUL5
58
135
LVB2P
AUR5
LVBCKM
59
134
AUVRM
60
133
LVBCKP
AUOUTL2
61
132
LVB3M
AUOUTR2
LVB3P
62
131
AUOUTL1
63
130
LVB4M
AUOUTR1
64
129
LVB4P
LGE4768A (Matrix Only SD Divx_RM_NON SRS)
2009/11/30
4
5
LGE Internal Use Only

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