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Errata
MSP430F6720 Microcontroller
This document describes the known exceptions to the functional specifications (advisories).
1 Functional Advisories............................................................................................................................................................
2 Preprogrammed Software Advisories..................................................................................................................................
3 Debug Only Advisories..........................................................................................................................................................
4 Fixed by Compiler Advisories...............................................................................................................................................
5 Nomenclature, Package Symbolization, and Revision Identification................................................................................
Nomenclature.........................................................................................................................................................4
Markings..............................................................................................................................................................4
5.3 Memory-Mapped Hardware Revision (TLV Structure).......................................................................................................
Descriptions............................................................................................................................................................6
7 Revision History...................................................................................................................................................................
SLAZ338AF - OCTOBER 2012 - REVISED MAY 2021
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ABSTRACT
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Copyright © 2021 Texas Instruments Incorporated
Table of Contents
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MSP430F6720 Microcontroller
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Summary of Contents for Texas Instruments MSP430F6720
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Page 1: Table Of Contents
5 Nomenclature, Package Symbolization, and Revision Identification................5.1 Device Nomenclature.................................4 5.2 Package Markings................................4 5.3 Memory-Mapped Hardware Revision (TLV Structure)....................... 6 Advisory Descriptions................................6 7 Revision History................................... SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 2: Functional Advisories
Advisories that affect factory-programmed software. ✓ The check mark indicates that the issue is present in the specified revision. Errata Number ✓ BSL7 ✓ BSL14 MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 3: Debug Only Advisories
Options: Check -msilicon-errata= and -msilicon-errata-warn= options • MSP430 GCC User's Guide IAR Embedded Workbench • IAR workarounds for msp430 hardware issues SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 4: Nomenclature, Package Symbolization, And Revision Identification
XMS – Experimental device that is not necessarily representative of the final device's electrical specifications MSP – Fully qualified production device Support tool naming prefixes: X: Development-support product that has not yet completed Texas Instruments internal qualification testing. null: Fully-qualified development-support product. XMS devices and X development-support tools are shipped against the following disclaimer: "Developmental product is intended for internal evaluation purposes."... -
Page 5: Memory-Mapped Hardware Revision (Tlv Structure)
Further guidance on how to locate the TLV structure and read out the HW_ID can be found in the device User's Guide. SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 6: Advisory Descriptions
Category Functional Function ADC stops operating if ADC clock source is changed from SMCLK to another source while SMCLKOFF = 1. MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... - Page 7 Scenario 2: When a battery is connected to DVCC, AUXVCC1 or AUXVCC2 as the first voltage supply, due to the low internal resistance of the battery a very fast rise time is SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 8 The feature in the BSL to keep the JTAG unlocked by setting the bit BSL_REQ_JTAG_OPEN in the return value has been disabled in this device. Workaround None CPU Module CPU21 Category Compiler-Fixed MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 9 PC corruption when single-stepping through flash erase Description When single-stepping over code that initiates an INFOD Flash memory erase, the program counter is corrupted. SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 10 (SFRIE1.VMAIE) if it is enabled. This issue occurs if the POPM assembly instruction is performed up to the top of the STACK. MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 11 (last 4 or 8 byte) of a memory (e.g.- FLASH, RAM, FRAM) that is not contiguous to a higher, valid section on the memory map. SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 12 (TXIFG and RXIFG) may not be seen by the DMA module and the transfer of the bytes is missed. Once the first byte in a MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 13 DMA transfers are not active (before the start or after the end of the DMA transfers). EEM Module EEM17 Category Debug Function Wrong Breakpoint halt after executing Flash Erase/Write instructions SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 14 EEMs data watch point, state storage, and breakpoint functionality. Workaround None. Note This erratum affects debug mode only. JTAG Module JTAG26 Category Debug Function LPMx.5 Debug Support Limitations MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 15 LPMx.5 debug support feature is enabled. To avoid a potentially unreliable debug session or general issues with JTAG device connectivity and the resulting bad customer experience Texas Instruments has chosen to remove the LPMx.5 debug support feature from common MSP430 IDEs including TIs Code Composer Studio 6.1.0 with msp430.emu updated to version 6.1.0.7 and IARs Embedded Workbench...
- Page 16 (SVMLE= 0 and SVSLE= 0, or SVMLFP= 1 and SVSLFP= 1) AND MCLK is sourced from the internal DCO running over MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 17 PMM Module PMM15 Category Functional Function Device may not wake up from LPM2, LPM3, or LPM4 SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 18 Any write to the SVSMxCTL register must be followed by a settling delay (PMMIFG.SVSMLDLYIFG = 0 and PMMIFG.SVSMHDLYIFG = 0) before entering LPM2, LPM3, LPM4. MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 19 If the OVP feature of SVM high side is enabled going into LPM234, the SVM might trigger at DVCC voltages below 3.6V (~3.5V) within a few ns after wake-up. This can falsely SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 20 2) Activate NMI interrupt and handle reset events in this time by SW (optional if reset functionality required during access SVSMHCTL or SVSMLCTL) then 3) Enable RST pin reset function after access to SVSMHCTL or SVSMLCTL MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 21 If the NMI interrupt for the OFIFG is enabled, an unintentional NMI interrupt will be triggered and needs to be handled. SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 22 Because the UCBUSY bit is stuck to 1 or toggles, the clock request stays enabled and this adds additional current consumption in low power mode operation. MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 23 UCRXIFG and UCTXIFG. If UCTXIFG is set twice but UCRXIFG is not set, reset the MSP SPI slave by setting and then clearing the UCSWRST bit, and inform the SPI master to resend the data. SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 24 UCxSTE transitioning to the master-inactive state, the data must be rewritten into UCxTXBUF to be transferred when UCxSTE transitions back to the master-active state. MSP430F6720 Microcontroller SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
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Page 25: Revision History
Page • Changed the document format and structure; updated the numbering format for tables, figures, and cross references throughout the document........................6 SLAZ338AF – OCTOBER 2012 – REVISED MAY 2021 MSP430F6720 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... - Page 26 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2021, Texas Instruments Incorporated...
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