Dg-Board (3 Of 10) Schematic Diagram - Panasonic TH-37PV70F Service Manual

15.25. DG-Board (3 of 10) Schematic Diagram

1
2
3
SUB3.3V
C8555
16V
0.1u
R8564
10k
*IC8554
<
128/256Mbit NOR FLASH
TVRP280
4
TH-37/42PV70F/P, TH-37/42PX70B/E
DG-Board (3 of 10) Schematic Diagram
19 20
D-LATCH
SUB3.3V
IC8621
C0JBAZ002845
AA_ED0
AA_ED1
AA_ED2
1 OE 20
Vcc C8622
AA_ED3
AA_EA8 R8621 68 AA_EA15 16V
2 Q0 19 R8629 68
AA_ED4
Q7 0.1u
AA_ED0 AA_ED7
3 D0 18 AA_ED5
D7
AA_ED6
AA_ED1 AA_ED6
4 D1 17
D6 AA_ED7
AA_EA9 R8622 AA_EA14
68 5 Q1 16 R8630 68
Q6
AA_ED8
AA_EA10 R8623 68 R8631 68 AA_EA13
6 Q2 15
Q5 AA_ED9
AA_ED2 AA_ED5
7 D2 14 AA_ED10
D5
AA_ED11
AA_ED3 8 D3 13 AA_ED4
D4 AA_ED12
AA_EA11 R8624 68 AA_EA12 AA_ED13
9 Q3 12 R8632 68
Q4
AA_ED14
10 GND 11
LE AA_ED15
D-LATCH
AA_EA0
AA_EA1
IC8622
AA_EA2
AA_EA3
C0JBAZ002845
AA_EA4
AA_EA5
1 OE 20
Vcc C8621
AA_EA6
AA_EA16 R8625 68 R8633 68 AA_EA23 16V
2 Q0 19
AA_EA7
Q7 0.1u
AA_ED8 AA_ED15 AA_EA24
3 D0 18
D7
AA_EA25
AA_ED9 AA_ED14
4 D1 17
D6
AA_EA17 AA_EA22
R8626 68 5 Q1 16 R8634 68
Q6
AA_EA18 R8627 68 R8635 68 AA_EA21
6 Q2 15
Q5
AA_ED10 AA_ED13
7 D2 14
D5
AA_ED11 AA_ED12
8 D3 13
D4
AA_EA19 R8628 68 R8636 68 AA_EA20
9 Q3 12
Q4
10 GND 11
LE
SUB3.3V
ed_pullup_sel
H:Int.PU on ED
R8871
10k
AA_FE_XRST
R8874 AA_XECS0
10k
AA_XECS1
AA_XECS2
TP8854 BOOTBT
L:ADMPX AA_XEAS
AA_XNMIRQ
R8868
68 AA_XIRQ1
AA_XIRQ2
AA_ERXW
AA_XERE
AA_XEWE0
AA_XEWE1
AA_XEDK
AA_ECLK
AA_ESZ0
AA_ESZ1
AA_XRST
AA_BOOTSWAP
0
R8870
AG_DTV_VOUTENB
AG_SD_BOOT_STS
TP8851
! DG-BOARD (3/10)
AA_SBI0
AA_SBO0
TXNDG1HNTB (PX70B)
TZTNP01HNTD (PX70E)
TXNDG1KYTE (PV70F)
TZTNP01MFTE (PV70P)
AD_TMS
AD_TRST
AD_TO_BA01
AD_TO_GC3FS_NEXT
AD_TCK
R8745
10k
21 22
LiteII
to(1/10)
MAIN3.3V
R8555 68
XNFCE INT.PU
R8556 68 NAND I/F
NANDRYBY non
R8557 68
NFCLE non
R8558 68
XNFWE INT.PU
R8559 68
XNFRE INT.PU
R8560 68
NFALE non
R8561 68
XNFWP INT.PU
Reserved for NAND I/F
AD_SDA0
AD_SCL0
R8867
EXB2HV680JV ADDRESS MPXed, if D-Latch AD_SDA1
ExBUS
ED0 /EA8 AD_SCL1
ED1 /EA9 AD_SDA2
ED2 /EA10 AD_SCL2
ED3 /EA11 AD_SDA3
ED4 /EA12 AD_SCL3
ED5 /EA13
ED6 /EA14
ED7 /EA15
AG_MODEM_LED2/CLK74SEL
ED8 /EA16
ED9 /EA17
ED10 /EA18
ED11 /EA19
ED12 /EA20
ED13 /EA21
ED14 /EA22
ED15 /EA23
PV70F/P ONLY
R8866
EXB2HV680JV ED/EA with Int.PU at start
(XECS2,3 setting)
AC_CHDI0
R8865
EXB2HV680JV AC_CHDI1
EA0 AC_CHDI2
EA1 AC_CHDI3
EA2 ExBUS AC_CHDI4
EA3 AC_CHDI5
EA4 AC_CHDI6
EA5 AC_CHDI7
EA6
EA7
R8710 68
VI2P4 EA24 INT.PD
R8703
68
EXB2HV103JV
AC_CHCLK
SUB3.3V
AC_CHVAL
AC_CHSYNC
SMTCMD0 XPDCD1
SMTSEL0
XPDCD2
SUB3.3V AC_XPDWT
SMTCLK0
XCI_IREQ
RMCO PORT16[5]
VI2ENB PORT6[6]:PSV1 B_PORT
*R8474
R8869
10k EXB28V103JX
VI1P20 CI_OCP
IS0PSYNC CI_POWER_ON
AC_CHDI0
TP8852
ADCCK RSV2 PORT5[2] Hi-Z AC_CHDI1
TP8853
AC_CHDI2
SLRCK
RSV3 PORT5[1] Hi-Z
AC_CHDI3
ExBUS AC_CHDI4
XECS3,5,7: USED FOR OTHER PORPOSE PINS AC_CHDI5
R8947 68
XECS6 INT.PU AC_CHDI6
see also SDA2 for ea_pullup_sel
AC_CHDI7
R8877
68
XECS0 OUTPUT
R8878 68
XECS1 OUTPUT AC_CHVAL
R8879
68
XECS2 Reserved/(ed_pullup_sel) AC_CHSYNC
R8880 68
XECS4 OUTPUT/(BOOTBT) AC_CHCLK
R8881 68 GUARD_CLK
IS1DATA PORT16[4] Hi-Z
R8882 68
XNMIRQ INT.PU
SMTCMD0
R8883 68 XPDCD1
XIRQ1 NEED EXT.PU
R8884 NET0031303 SMTSEL0
68 XPDCD2
XIRQ2 NEED EXT.PU
SMTCLK0 XCI_IREQ
XIRQ3 for HDMI_INT in ADV sheet
AC_XPDWT
R8885 68
ERXW INT.PU
R8886 68
XERE INT.PU AC_REG
R8887
68
XEWE0 INT.PU
R8888 68 AC_XPDOE
XEWE1 INT.PU
R8889 AC_XPDWE
68
XEDK INT.PU
R8890 68
GUARD_CLK
ECLK OUTPUT AC_IORD
R8891 68
ESZ0 OUTPUT AC_IOWR
R8892
68
ESZ1 OUTPUT
AC_XPDCE1
R8893 0
XRST
R8894
68
BOOTSWAP INT.PU AC_XETS
AC_XEAB
AC_CI_XRST
R8895
0 DSRCK
R8896
0
VOUTENB INT.PD
R8897
0 ADIN PORT16[7], SD_BOOT Hi-Z
CH0CLK
CH0PSYNC
VI1CLK2 CH0VAL
CH0DATA
R8900
68
SBI0 DUBUG/JIG
R8901 68
SBO0
INT.PU
AA_SBI0
to(10/10)
AA_SBO0
SUB3.3V
R8742 JTAG
10k
R8735 68
TMS
R8736
68
TRST
R8737 68
TDI
R8738 68
TDO
R8739 68
TCK
R8746 R8749
10k 10k
23 24
87
TH-37PV70F / TH-37PV70P / TH-37PX70B / TH-37PX70E / TH-42PV70F / TH-42PV70P / TH-42PX70B / TH-42PX70E
LiteII
SUB3.3V
to(1/10)
I2C
R8911 68
SDA0
R8912 68
SCL0
R8913 68
SDA1
R8914 68
SCL1
R8915 68
SBT0
R8916 68
SBT2
R8917 68
XECS3 (ea_pullup_sel)
R8918 68 H:Int.PU on EA
XECS5
CLKGEN_S2
R8927
0
RESERVED
N.C. for CLKGEN port
25M
4.9152M
24.576M
*R8472
SUB3.3V
*R8475
EXB28V103JX
CI I/F
PORT15[4]
Hi-Z
VI1P20
R8929 IS0PSYNC
EXB2HVR000V
XDCD0
XCTS0
XRI0
TXD0
RXD0
SMTCLK1
SMTD1
CI PARALLEL TS
SMTRST1
Hi-Z
XRTS0
R8851
0
XDTR0
R8852 0
XDSR0
R8853 0
SMTCMD0 Hi-Z
SMTSEL0 Hi-Z
SMTCLK0 Hi-Z
SMTD0 Hi-Z
0
R8854
ERJ2GE0R00X
CH1CLK Hi-Z
R8855
68
XEXDMK0 INT.PU
R8856 68
XEXDMR0 Hi-Z
R8857 68
SMTCMD1 Hi-Z
R8858 68
SMTSEL1 Hi-Z
R8859 68
XECS7 CI_#CE1 Hi-Z
R8860 68
Hi-Z
CH1PSYNC INT.PU
R8862 68
CH1DATA INT.PU
R8863 68
VI2P20 PORT9[5] CI_XRST INT.PD
R8864 68
TUNER SERIAL TS
CH0CLK Hi-Z
CH0PSYNC INT.PD
CH0VAL INT.PD
CH0DATA INT.PD
TH-37/42PV70F/P, TH-37/42PX70B/E
DG-Board (3 of 10) Schematic Diagram
25 26
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