Diagrams; Ic Pin Function Description - Sony CDP-XA20ES Service Manual

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SECTION 6

DIAGRAMS

6-1. IC PIN FUNCTION DESCRIPTION

BD BOARD IC101 CXD2545Q
(DIGITAL SIGNAL PROCESSOR, FOCUS/TRACKING/SLED SERVO, EFM COMPARATOR)
Pin No. Pin Name
I/O
1
SRON
O
Sled servo drive PWM signal output terminal Not used (open)
2
SRDR
O
Sled servo drive PWM signal (–) output to the BA6297AFP (IC102)
3
SFON
O
Sled servo drive PWM signal output terminal Not used (open)
4
TFDR
O
Tracking servo drive PWM signal (–) output to the BA6297AFP (IC102)
5
TRON
O
Tracking servo drive PWM signal output terminal Not used (open)
6
TRDR
O
Tracking servo drive PWM signal (+) output to the BA6297AFP (IC102)
7
TFON
O
Tracking servo drive PWM signal output terminal Not used (open)
8
FFDR
O
Focus servo drive PWM signal (+) output to the BA6297AFP (IC102)
9
FRON
O
Focus servo drive PWM signal output terminal Not used (open)
10
FRDR
O
Focus servo drive PWM signal (–) output to the BA6297AFP (IC102)
11
FFON
O
Focus servo drive PWM signal output terminal Not used (open)
12
VCOO
O
Oscillator circuit output terminal for analog PLL of the playback EFM Not used (open)
13
VCOI
I
Oscillator circuit input terminal for analog PLL of the playback EFM Not used (fixed at "L")
14
TEST
I
Input terminal for the test (fixed at "L")
15
DVSS
Ground terminal (digital system)
16
TES2
I
Input terminal for the test (fixed at "L")
17
TES3
I
Input terminal for the test (fixed at "L")
18
PDO
O
Charge-pump output terminal for analog PLL of the playback EFM Not used (open)
19
VPCO
O
PLL charge-pump output terminal for the variable pitch Not used (open)
20
VCKI
I
Clock signal input from external VCO for the variable pitch Not used (fixed at "L")
21
AVD2
Power supply terminal (+5V) (analog system)
22
IGEN
I
Power supply terminal (+5V) (for operational amplifier)
23
AVS2
Ground terminal (analog system)
24
ADIO
O
Output terminal of the operational amplifier Not used (open)
25
RFC
I
Input terminal for the A/D converter Not used (open)
26
RFDC
I
RF signal (DC level) input terminal for the digital servo process
27
TE
I
Tracking error signal input from the RF amplifier in optical pick-up
28
SE
I
Sled error signal input from the RF amplifier in optical pick-up
29
FE
I
Focus error signal input from the RF amplifier in optical pick-up
30
VC
I
Middle point voltage (+2.5V) input from the RF amplifier in optical pick-up
31
FILO
O
Filter output terminal for master clock of the playback master PLL
32
FILI
I
Filter input terminal for master clock of the playback master PLL
33
PCO
O
Phase comparison output terminal for master clock of the playback EFM master PLL
34
CLTV
I
Internal VCO control voltage input of the playback master PLL
35
AVS1
Ground terminal (analog system)
36
RFAC
I
RF signal (AC level) input terminal for the EFM demodulator
37
BIAS
I
Constant current input terminal of the playback EFM asymmetry circuit
38
ASYI
I
Playback EFM asymmetry comparator voltage input terminal
39
ASYO
O
Playback EFM full-swing output terminal
40
AVD1
Power supply terminal (+5V) (analog system)
41
DVDD
Power supply terminal (+5V) (digital system)
42
ASYE
I
Playback EFM asymmetry circuit on/off selection input terminal (fixed at "H")
43
PSSL
I
Audio data output mode selection input terminal (fixed at "L")
Function
– 15 –
Pin No. Pin Name
I/O
44
WDCK
O
Word clock signal (88.2 kHz) output terminal Not used (open)
45
LRCK
O
L/R sampling clock signal (44.1 kHz) output to the CXD8505BQ (IC302)
DA16 output when PSSL="H", 48-bit slot serial data output when PSSL="L"
46
DATA
O
(PSSL (pin $£)=fixed at "L") Serial data output to the CXD8505BQ (IC302)
DA15 output when PSSL="H", 48-bit slot bit clock signal output when PSSL="L"
47
BCLK
O
(PSSL (pin $£)=fixed at "L") Bit clock signal (2.8224 MHz) output to the CXD8505BQ (IC302)
DA14 output when PSSL="H", 64-bit slot serial data output when PSSL="L"
48
64 DATA
O
(PSSL (pin $£)=fixed at "L")
DA13 output when PSSL="H", 64-bit slot bit clock signal output when PSSL="L"
49
64 BCLK
O
(PSSL (pin $£)=fixed at "L")
DA12 output when PSSL="H", 64-bit slot L/R sampling clock signal output when PSSL="L"
50
64 LRCK
O
(PSSL (pin $£)=fixed at "L")
DA11 output when PSSL="H", GTOP signal output when PSSL="L"
51
GTOP
O
(PSSL (pin $£)=fixed at "L")
DA10 output when PSSL="H", XUGF signal output when PSSL="L"
52
XUGF
O
(PSSL (pin $£)=fixed at "L")
DA09 output when PSSL="H", XPLCK signal output when PSSL="L"
53
XPLCK
O
(PSSL (pin $£)=fixed at "L")
DA08 output when PSSL="H", GFS (guard frame sync) signal output when PSSL="L"
54
GFS
O
(PSSL (pin $£)=fixed at "L")
DA07 output when PSSL="H", RFCK (read frame clock) signal output when PSSL="L"
55
RFCK
O
(PSSL (pin $£)=fixed at "L")
DA06 output when PSSL="H", C2PO signal output when PSSL="L"
56
C2PO
O
(PSSL (pin $£)=fixed at "L")
DA05 output when PSSL="H", XRAOF (RAM over flow) signal output when PSSL="L"
57
XRAOF
O
(PSSL (pin $£)=fixed at "L")
DA04 output when PSSL="H", MNT3 (monitor 3) signal output when PSSL="L"
58
MNT3
O
(PSSL (pin $£)=fixed at "L")
DA03 output when PSSL="H", MNT2 (monitor 2) signal output when PSSL="L"
59
MNT2
O
(PSSL (pin $£)=fixed at "L")
DA02 output when PSSL="H", MNT1 (monitor 1) signal output when PSSL="L"
60
MNT1
O
(PSSL (pin $£)=fixed at "L")
DA01 output when PSSL="H", MNT0 (monitor 0) signal output when PSSL="L"
61
MNT0
O
(PSSL (pin $£)=fixed at "L")
62
XTAI
I
System clock input terminal (16 MHz)
63
XTAO
O
System clock output terminal (16 MHz) Not used (open)
64
XTSL
I
System clock selection input terminal (fixed at "L")
65
DVSS
Ground terminal (digital system)
2/3 divider input terminal of pins ^™ (XATI) and ^£ (XTAO)
66
FSTI
I
2/3 divider output terminal of pins ^™ (XATI) and ^£ (XTAO)
67
FSTO
O
68
FSOF
O
4.2336 MHz clock signal output terminal Not used (open)
69
C16M
O
16.9344 MHz clock signal output terminal Not used (open)
70
MD2
I
Digital out on/off control signal input terminal (fixed at "H")
71
DOUT
O
Digital signal (for coaxial out and optical out) output terminal
72
EMPH
O
Emphasis control signal output terminal Not used (open)
73
WFCK
O
Write frame clock signal output terminal Not used (open)
74
SCOR
O
Sub-code sync (S0+S1) detection signal output to the system controller (IC351)
Function
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
– 16 –

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