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XMC-CPU/2041
XMC/PMC Quad Core PowerPC™ CPU
with FPGA
Hardware Manual
to Product V.2029.01
XMC-CPU/2041
Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4
Page 1 of 29
esd electronic system design gmbh
Vahrenwalder Str. 207 • 30165 Hannover • Germany
http://www.esd.eu
Phone: +49 (0) 511 3 72 98-0 • Fax: +49 (0) 511 3 72 98-68
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Summary of Contents for ESD electronic XMC-CPU/2041
- Page 1 XMC-CPU/2041 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 Page 1 of 29 esd electronic system design gmbh Vahrenwalder Str. 207 • 30165 Hannover • Germany http://www.esd.eu Phone: +49 (0) 511 3 72 98-0 • Fax: +49 (0) 511 3 72 98-68...
- Page 2 All rights to this documentation are reserved by esd. Distribution to third parties, and reproduction of this document in any form, whole or in part, are subject to esd's written approval. © 2015 esd electronic system design gmbh, Hannover esd electronic system design gmbh Vahrenwalder Str.
- Page 3 New chapter, description of X900 adapters 2015-06-23 New chapter, description of X400 adapter Order Information, adapters inserted Technical details are subject to change without further notice. XMC-CPU/2041 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 Page 3 of 29...
- Page 4 ● The XMC-CPU/2041 may become warm during normal use. Always allow adequate ventilation around the XMC- CPU/2041 and use care when handling. ● Do not operate the XMC-CPU/2041 adjacent to heat sources and do not expose it to unnecessary thermal radiation. Ensure an ambient temperature as specified in the technical data.
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Page 5: Table Of Contents
Table of contents 1. Overview............................6 XMC-CPU/2041 View with Connectors and LEDs................7 PCB Top Layer View with Connectors and LEDs..............7 PCB Bottom Layer View with LEDs, JTAG and Debug Interface...........8 2.2.1 Indication of CON Activity (LED 1222) and USB PWR (LED1230) .......8... -
Page 6: Overview
16 Mbyte SPI Flash for boot loader and 32 Kbit I²C EEPROM for U-Boot environment offer non- volatile memory spaces. The XMC-CPU/2041 is equipped with a second 16 Mbyte “fallback” SPI Flash that is used for system recovery, if a system crash occurs during a firmware update. -
Page 7: Xmc-Cpu/2041 View With Connectors And Leds
See also page 16 and following for signal assignments of the connectors. The JTAG connector and the Debug interface connector have to be connected on the PCB bottom side of XMC-CPU/2041 (see Figure 3 for the position of the connectors and pins). XMC-CPU/2041 Hardware Manual •... -
Page 8: Pcb Bottom Layer View With Leds, Jtag And Debug Interface
The Debug interface and the JTAG interfaces have to be connected from the bottom side of the XMC-CPU/2041. See also page 16 and following for signal assignments of the connectors. esd offers special adapters as accessories, see “Order Information” on page 29. -
Page 9: Front Panel View With Connectors And Leds
XMC-CPU/2041 View with Connectors and LEDs 2.3 Front Panel View with Connectors and LEDs Figure 4: Front panel view 2.3.1 LED0-4 Indication of the TriColor LEDs Five TriColor LEDs are equipped in the front panel. Signal name Colour Description in schematic... -
Page 10: Hardware Installation
Pay attention that the XMC-CPU/2041 is correctly installed on the carrier board. Fix the XMC-CPU/2041 with the screws on the carrier board. Use the four M 2.5 x 6 mm screws which are contained in the product package of the module. -
Page 11: Technical Data
Only for test- and programming purposes: Debug internal connector (under the heat sink), has to be connected from the bottom side of the XMC-CPU/2041. Samtec CLM108-02-F-D-BE (pass-thru micro socket, X900) - Debug interface of the CPU and the Health Controller... -
Page 12: Cpu And Memory
- OHCI-Host controller- and device driver - driver of the operating system Connector Mini USB type-AB socket in the front panel (USB) Table 6: Data of the USB Host interface USB Page 12 of 29 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 XMC-CPU/2041... -
Page 13: Con, Usb Device Interface
Device ID / Vendor ID Constant, 0x0410 / 0x1957 Subsystem Device ID / 0x0701 / 0x12FE as endpoint Subsystem Vendor ID Table 9: Data of the XMC interface XMC-CPU/2041 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 Page 13 of 29... -
Page 14: I²C Interface
Depending on FPGA configuration, see XILINX data sheet Electrical isolation None Protection circuit None, current-limiting resistors are not provided. Connector XMC-P14 Table 12: Data of the digital in-/outputs Page 14 of 29 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 XMC-CPU/2041... -
Page 15: Health
Selection of the SPI FLASH for booting, GPIO expander for various control functions 4.12 Software Support The flash memory carries the standard boot program U-boot and enables the XMC-CPU/2041 to boot various operating systems from network or on-board SPI-Flash. ®... -
Page 16: Connector Assignments
Device connector: 5-pin mini USB socket, standard type B Pin Position: Pin Assignment: (X1220) Signal Description: +5 V power supply voltage D+, D-... USB signal lines Data+, Data- -... not connected GND... Reference potential Page 16 of 29 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 XMC-CPU/2041... -
Page 17: Ethernet Eth0, Eth1
MDIx+, MDIx- ... Ethernet data lines (x = 0 - 3) Shield... case shield, connected with the front panel of the XMC-CPU/2041. Note: Cables of category CAT5e or higher have to be used to grant the function in networks with 1000 Mbit/s. -
Page 18: Pmc Connectors
Connector Assignments 5.4 PMC Connectors The XMC-CPU/2041 uses the PMC connectors P11, P12 and P14. The assignment of the connectors P11 and P12 is in accordance with IEEE1386. P14 is assigned module-specific. 5.4.1 PMC P11 Connector Signal Signal -12V INTA#... -
Page 19: Pmc P12 Connector
PERR# +3.3V SERR# C/BE1# AD[14] AD[13] M66EN AD[10] AD[08] +3.3V AD[07] n.c. (REQB#) +3.3V n.c. (GNTB#) n.c. (reserved) n.c. (reserved) EREADY RESETOUT# n.c. (ACK64#) +3.3V MONARCH# XMC-CPU/2041 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 Page 19 of 29... -
Page 20: Pmc P14 I/O Connector
CLK Input 31 FPGA-IO<30> 3.3V, IO 42-P CLK Input 41-P CLK Input 32 FPGA-IO<31> 3.3V, IO * The optional pin assignment is only available on request. Page 20 of 29 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 XMC-CPU/2041... - Page 21 * The optional pin assignment is only available on request. Note: The signals in the column "Alternative Signal Name" are assembly options that can be switched via 0 Ω resistors on request! XMC-CPU/2041 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 Page 21 of 29...
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Page 22: P15 Pci Express Interface
X0.TCK LC.RST0# PEX4 Tx+ PEX4 Tx- 3.3 V PEX5 Tx+ PEX5 Tx- VPWR X0.TRST# LC.PERST# PEX2 Tx+ PEX2 Tx- 3.3 V PEX3 Tx+ PEX3 Tx- VPWR Page 22 of 29 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 XMC-CPU/2041... -
Page 23: Jtag X900
Connector Assignments 5.6 JTAG X900 The JTAG interface has to be connected from the bottom side of the XMC-CPU/2041. esd offers two adapters, the XMC-CPU/2041-ADAPTER-BDI and the XMC-CPU/2041-ADAPTER-NXP as accessories. See Order Information on page 29 for more detail. 5.6.1 XMC-CPU/2041-ADAPTER-BDI The XMC-CPU/2041-ADAPTER-BDI (esd order No.: V.2029.02) is an interface to connect the... -
Page 24: Xmc-Cpu/2041-Adapter-Nxp
Connector Assignments 5.6.2 XMC-CPU/2041-ADAPTER-NXP The XMC-CPU/2041-ADAPTER-NXP (esd order No.: V.2029.04) is an interface to connect the NXP (Health Controller) to the XMC-CPU/2041 connector X900. Samtec CLM <-> box header (16 pins) (6 pins) Figure 6: XMC-CPU/2041-ADAPTER-NXP Notice: The 16-pole SMD strip has no inverse-polarity protection! Property damage may result due to incorrect adapter connection. -
Page 25: Debug Interface X400
Connector Assignments 5.7 Debug Interface X400 The Debug interface has to be connected from the bottom side of the XMC-CPU/2041. esd offers the XMC-CPU/2041-ADAPTER-FPGA as accessory, see Order Information on page 29. 5.7.1 XMC-CPU/2041-ADAPTER-FPGA The XMC-CPU/2041-ADAPTER-FPGA (esd order No.: V.2029.03) is an interface to connect the Tool XILINX ChipScope to the XMC-CPU/2041 connector X400. -
Page 26: Fpga
16-bit enhanced Local Bus interface incl. 32-bit access PCI Express interface, as device and master Example/Test Code NAND FLASH interface. Control of the TriColor LED's in the front panel FIFO 32 bits wide Page 26 of 29 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 XMC-CPU/2041... -
Page 27: Bootloader
The U-Boot source is available from esd on request. 7.2 Configuration and Console Access Use an USB cable with mini-B connector (XMC-CPU/2041 side) and type A connector (PC side) to connect the XMC-CPU/2041 to a PCs USB port. The U-Boot console is accessible via the front panel's USB 'CON' device port (mini-B socket). - Page 28 Fman1: Uploading microcode version 101.8.0 PHY reset timed out PHY reset timed out PHY reset timed out FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3, FM1@DTSEC4 [PRIME], FM1@DTSEC5 Hit any key to stop autoboot: 0 => Page 28 of 29 Hardware Manual • Doc. No.: V.2029.21 / Rev. 1.4 XMC-CPU/2041...
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Page 29: Order Information
Interface to NXP (Healthcontroller) XMC-CPU/2041 X900 V.2029.04 (Samtec CLM (16 pin) <-> box header (6 pins)) XMC-CPU/2041-ADAPTER-FPGA XMC-CPU/2041-ADAPTER-FPGA Interface to connect the Tool XILINX ChipScope to XMC-CPU/2041 X400 V.2029.03 (Samtec CLM (8 pins) <-> box header (10 pins)) Software XMC-CPU/2041-VxW VxWorks BSP V.2029.30...
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