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9. BLOCK DIAGRAM
10. CIRCUIT OPERATION
10.1. Bell Detector Circuit
When the bell signal is input between T/R, the signal are outputted at the speaker via the
following path: Tel line
R1/C1
D1
Pin 1 of IC1
Pin 8 of IC1
C6
T1
C625
Speaker
10.2. Line Interface
In talk status, SW101 become ON and Q103 base changes to high level, causing Q103, Q101 to
turn on and resulting in a line loop.The loop current flows from D101(+)
Q101
Q108
R124
D106 in that order, A pulse signal that repeated switches between high and low logic is
output from pin 39 of the CPU.This switches the line loop on and off, generating the dial pulse
signal.
10.3. MODULE BLOCK DIAGRAM
26
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