The HDMI Mezzanine Card is a LatticeECP3 Video Protocol Board daughter card designed for demonstrating the Lattice HDMI/DVI solution using LatticeECP3 SERDES. The scope of this user’s guide covers only revision B of the HDMI Mezzanine Card. Please refer to EB52, LatticeECP3 Video Protocol Board Revision C User’s Guide...
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HDMI Mezzanine Card – Revision B User’s Guide nals is different from the SERDES CML signals, and the TMDS coding scheme maintains the DC balance of the signal, the AC coupling capacitors are used to block the DC component of the driving signal. Figure 2 shows the functional block diagram of the HDMI Mezzanine Card.
HDMI Mezzanine Card – Revision B User’s Guide Figure 3. HDMI Mezzanine Card Installed on the LatticeECP3 Video Protocol Board Header Settings This section describes the header settings on the HDMI Mezzanine Card. However, since the card uses SERDES quad C when plugging into the LatticeECP3 Video Protocol Board, the VCCOB and the VCCIB of SERDES quad C need to be powered properly.
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HDMI Mezzanine Card – Revision B User’s Guide Figure 4. Headers for CEC, HDP, S Settings, LatticeECP3 Video Protocol Board J3 (HDMI Out) J3 (HDMI Out) H12, H11, H10, H9 are associated with HDMI Out H12, H11, H10, H9 J2 (HDMI Input 2) J2 (HDMI Input 2) H8, H7, H6, H5 are associated...
HDMI Mezzanine Card – Revision B User’s Guide Appendix B. Hardware Variants Early versions of the HDMI Mezzanine Card Revision B were produced with U3 (STMicroelectronics STDVE001A Adaptive single 3.4 Gbps TMDS/HDMI signal equalizer) populated. On the current version of the HDMI Mezzanine Card Revision B, U3 is not populated.