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June 2007
Introduction
The Lattice 7:1 LVDS Video Demo Kit is a set of boards intended to bring RGB video data into the LatticeECP2™
FPGA where it can be processed and transmitted to an output display. It is intended to be used as a reference
design and to demonstrate the capabilities of the LatticeECP2 FPGA in video processing applications.
The complete kit consists of up to five boards. The heart of the kit is the LatticeECP2 Advanced Evaluation Board,
featuring a LatticeECP2-50 FPGA device. The kit is optionally available without this board.
The other four boards feature the required I/O interfaces to complete the demonstration. These are described in
more detail below.
About This Guide
This document includes descriptions of the design of the boards, the design of the IP for the LatticeECP2™ FPGA,
the items required to run the demonstration, and how to connect the boards and the cables for the demo.
Additional Resources
Additional resources related to the Lattice 7:1 LVDS Video Demo Kit, including updated documentation, HDL
source and bitstream programming files for the LatticeECP2 FPGA, a user's guide for the LatticeECP2 Advanced
Evaluation Board, and other related materials can be downloaded from the Lattice web site at: www.lattices-
emi.com/boards. Navigate to the page for the Lattice 7:1 LVDS Video Demo Kit, and see the "documents and
downloads" link on the left side of the page.
7:1 Video Demonstration Setup and Design
Figure 1 is an overview of the connection between the boards, the required cables, and a block diagram of the
demo design implemented in LatticeECP2-50. The video signals are color-coded to indicate the different I/O stan-
dards including TMDS (pink), LVCMOS/LVTTL (orange), and LVDS (yellow).
Figure 1. Block Diagram of the Lattice 7:1 LVDS Video Demo Kit Setup
Board #3
60-pin
connection
V
H
D
M
TMDS
Receiver
(TI TFP401A )
DVI
DVI Cable
Desktop PC
MDR-26 Channel-Link Cable
DVD Player
ATSC Tuner
DVD
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
Board #1 (or #4)
LatticeECP2 Advanced Evaluation Board
LatticeECP2-50 Device
V
V
H
H
D
D
R
M
M
Gain
Control
R
RGB to YCbCr Converter
Y
Contrast / Brightness / Hue /
Saturation Adjustments
Y
YCbCr to RGB Converter
R
R
Lattice 7:1 LVDS Video Demo Kit
LVDS 7:1 Rx
Deserializer
G
B
Gain
Gain
Control
Control
G
B
Cb
Cr
Cb
Cr
G
B
OSD
G
B
LVDS 7:1 Tx
Serializer
1
User's Guide
Technical Note TN1134
TMDS signals
LVCMOS/LVTTL signals
LVDS signals
MDR-26 Channel-Link Cable
DVI Cable
Board #1
Board #2
V
V
H
H
D
D
M
M
connection
LCD Display
DVI
TMDS
Driver
(TI TFP410)
V
H
D
M
60-pin
tn1134_01.2

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Summary of Contents for Lattice 7:1 LVDS

  • Page 1 Introduction The Lattice 7:1 LVDS Video Demo Kit is a set of boards intended to bring RGB video data into the LatticeECP2™ FPGA where it can be processed and transmitted to an output display. It is intended to be used as a reference design and to demonstrate the capabilities of the LatticeECP2 FPGA in video processing applications.
  • Page 2 The demo design is implemented in the LatticeECP2-50 FPGA. This design is described in further detail later in this guide, and is based on Lattice reference design RD1030, LatticeECP2/M 7:1 LVDS Video Interface. Source code for this design is available in both the VHDL and Verilog languages. The LVDS video signal is de-serialized by the LatticeECP2-50 for extracting the 8-bit R, 8-bit G, and 8-bit B pixel datum.
  • Page 3 Black banana plug cable Red banana plug cable 1. The Lattice 7:1 Video Demo Kit is available with or without the LatticeECP2 Advanced Evaluation Board and 5V wall-mount power adapter. 2. Some early versions of this kit may include a modified version of “Video Demo Board #1”...
  • Page 4 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Figure 3. Lattice 7:1 Video Demo Kit Contents LatticeECP2 Advanced Evaluation Board Video Demo Board #3 Video Demo Board #2 Compact Flash Video Video Demo 3 3.3V Demo 2 1.2V...
  • Page 5 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide • Video Demo Board #3 Default Jumper Settings: – Install jumpers on pin1-pin2 of J4, J5, J10 and J11. – Install jumpers on pin2-pin3 of J6, J7, J8 and J9.
  • Page 6 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Jumpers J34 and J55 are used for the JTAG chain connection setting. Please make sure they are at their default settings (J34: short and J55: open), which makes the LatticeECP2-50 the only device in the JTAG chain.
  • Page 7 LatticeECP2 Advanced Evaluation Board. (Note: in this figure, the Board #4 shown is the earlier, modified version of Board #1). Figure 6. Proper Installation of Video Demo Boards #1 and #4 to the Lattice ECP2 Advanced Evaluation Board •...
  • Page 8 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Figure 7. Proper Connection of the MDR-26 Channel Link Cables • Step 3: Connect the DVI Cables This demo requires two DVI cables. The video demo kit contains only one DVI cable. Therefore, you must use the original DVI cable that comes with the LCD display as well.
  • Page 9 Lattice Semiconductor User’s Guide Figure 8. Power Cable Connections for Lattice 7:1 LVDS Video Demo Kit After connecting the banana plug cables, you should connect the 5V wall-mount power adapter to the LatticeECP2 Advanced Evaluation Board. After completion of this step, the video demo system should look like Figure 8.
  • Page 10 LatticeECP2 FPGA, please refer to the LatticeECP2 Advanced Evaluation Board User Guide. The bitstream file for this demo, as well as other resources, can be downloaded from the Lattice web site at: www.latticesemi.com/boards. Navigate to the page for the Lattice 7:1 Video Demo Kit, and see the “documents and downloads”...
  • Page 11 8 fractional part bits. However, only 8 integer part bits (bit-15 down to bit-8) are passed to the OSD module. Figure 11 shows the block diagram of the 7:1 LVDS receiver module. This is the same receiver module as in the Lattice reference design RD1030, LatticeECP2/M 7:1 LVDS Video Interface . There is an auto-alignment logic in the receiver module that utilizes the deserialized data of RCLK_in to select the proper outputs of the four data pairs.
  • Page 12 LOCK The block diagram of the 7:1 LVDS transmitter is shown in Figure 12. Four 7-to-4 serializers are used for serializing the parallel R, G, B, VSYNC, HSYNC and DE signals. There is another serializer used for generating the LVDS out- put clock.
  • Page 13: Troubleshooting

    Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Figure 12. Block Diagram of 7:1 LVDS Transmitter Module IO DDR Registers (2x gearing) ODDRX2B* TA_in TA_out Serializer ODDRX2B* TB_in TB_out Serializer ODDRX2B* TC_in TC_out Serializer ODDRX2B* TD_in TD_out Serializer “1100011”...
  • Page 14 All of the different power supplies on the LatticeECP2 Advanced Evaluation Board are controlled by the Lattice Power Manager II POWR1220AT8. If SW1 Pin 1 is on (pushed down), the POWR1220AT8 device will be reset and all powers including the 3.3V will be disabled.
  • Page 15: Ordering Information

    01.2 Updated to match RD1030 version 01.2. © 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
  • Page 16: Appendix A. Jumpers Of The Video Demo Board

    Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Appendix A. Jumpers of the Video Demo Board #2 Table 4. Functions of the Jumpers on Video Demo Board #2 Jumper Function Description Default Setting This is an active low control for forcing the DS90CR288A into the /POWERDOWN powerdown mode.
  • Page 17: Power Down

    Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Appendix B. Jumpers of the Video Demo Board #3 Table 5. Functions of the Jumpers on Video Demo Board #3 Jumper Function Description Default Setting This jumper selects which multifunctional pins of the TFP401A TxIN7 (CTL3, CTL2, or CTL1) is connected to the DS90CR287’s TxIN7...
  • Page 18 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Appendix C. Schematics of the Video Demo Boards #1, #2, #3 and #4 Video Demo Board #1 Figure 14. Video Demo Board #1 Schematic...
  • Page 19 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Figure 12. Video Demo Board #1 Schematic (Cont).
  • Page 20 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Video Demo Board #2 Figure 15. Video Demo Board #2 Schematic...
  • Page 21 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Figure 13. Video Demo Board #2 Schematic (Cont.)
  • Page 22 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Video Demo Board #3 Figure 16. Video Demo Board #3 Schematic...
  • Page 23 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Figure 14. Video Demo Board #3 Schematic (Cont.)
  • Page 24 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Video Demo Board #4 Figure 17. Video Demo Board #4 Schematic...
  • Page 25 Lattice 7:1 LVDS Video Demo Kit Lattice Semiconductor User’s Guide Figure 15. Video Demo Board #4 Schematic (Cont.)
  • Page 26 Demo Board #1 is not equivalent to Video Demo Board #4. Please modify the .lpf preference file of reference design RD1030, LatticeECP2/M 7:1 LVDS Video Interface , to match the board that you are using on the Rx side. The Tx side can use either the reworked Board #1, non-reworked Board #1 or Board #4).
  • Page 27 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Lattice LFE2-50E-VID-EV...

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