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DIGITAL BLOCK DIAGRAM
0 2
DIGITAL
VIDEO IF
TO
JUNCTION
(VIDEO)
AO_IEC958, AI_D[0], A_MUTE2[H], K_BUS_CLK
CN7109
K_BUS_REQ, SYS_RESET[L], K_BUS_IN, K_BUS_OUT
AO_SCLK, AO_MCLKO, AO_FSYNC, DAC_RST[L]
DAC_SCL, DAC_SDA, AO_D[0], A_DAC_CS
CIN
TO
Q1008
JUNCTION
VYIN
Y
SW
(VIDEO)
CN7108
YVOUT
COUT
CBOUT
CROUT
Y
C
Cb
Cr
MEDIA PROCESSOR
TO
JLIP_TX
JUNCTION
JLIP_RX
(VIDEO)
CN7105
UART2_TX
UART2_RX
OPEN
3 6
1394PFY
JACK
TPA+
IC1801
TPA-
TPB+
1394
IEEE1394
TPB-
Controller
FLASH
MADD[1-5]
MADD[6-22]
IC1201
E5_RESET[L]
Flash
memory
LH_AR[6] to LH_AR[21]
MADD[6-21]
IC1203
ALE
IC1204
RD/WR[L]
Transparent
UWE[L]/UDS[L]
OE[L]/LDS[L]
MADD[1-5]
ELINK_INT[L]
MADD[6-22]
WAIT[L], DTACK[L]
E5_RESET[L]
CS[0], CS[1]
FOR JIG
MADD[1-5], ALE
UART2_TX, UART2_RX
SW5V, D5V, D3.3V
D2.5V, D1.8V, V3.3V
VI_D[2-9], VIDEO_RST[L]
VO_D[0-15], SPI_MOSI
VIDEO_27M, VIDEO_CS
C
IC1001
VIDEO_MUTE[H], SPI_CLK
VIDEO_RXD
Video
Y
Controller
AP, A0 to A9,DQ0 to DQ15
UDQM, WE,CAS, RAS
Q1002 to Q1007
IC1002
BUF
SDRAM
VIDEO_27M, VI_D[2-9], VO_D[0-15]
SDRAM_DQ[0- 31]
SDRAM_A[0-12]
SDRAM_A[14-17]
SDRAM_DQS[0- 3]
SDRAM_DQM[0-3]
SDRAM_CLK[0], SDRAM_CLK[1]
SDRAM_CLK_L[0], SDRAM_CLK_L[1]
SDRAM_CKE, SDRAM_RAS_L
SDRAM_CAS_L, SDRAM_WE_L
IC1401
Media
VIDEO_RXD, VIDEO_CS
PHY_RESET[L]
AO_SCLK, AO_FSYNC
Processor
PHY_LREQ
AO_MCLKO, AO_IEC958, AO_D[0]
PHY_CLK
AI_D[0], SPI_MOSI, SPI_CLK
PHY_CNA
DAC_SCL, DAC_SDA, A_DAC_CS
PHY_CTL[0]
DAC_RST[L], VIDEO_RST[L], VIDEO_MUTE[H]
PHY_CTL[1]
PHY_DATA[0-7]
PHY_LPS
PHY_LINK_ON
3.3V --> 5.0V
5.0V --> 3.3V
RD/WR[L]
OE[L]/LDS[L]
CS[0]
ATA_RESET, ATA_DAT[0-15], ATA_DMARQ
ATA_IORDY, ATA_INTRQ, ATA_DIOW[L]
ATA_DIOR[L], ATA_DMAACK[L], ATA_ADD[0-4]
VI_D[2-9]
VO_D[0-15]
VIDEO_27M
A_MUTE2[H]
K_BUS_CLK
K_BUS_REQ
IC1404
K_BUS_IN
SYS_RESET[L]
IC1405
K_BUS_OUT
2-71
2-72
DDR RAM
RA1609
SDRAM_DQ[0-15]
DDR_DQ[0-15]
to
RA1612
RA1613
IC1602
SDRAM_DQ[16-31]
DDR_DQ[16-31]
to
DDR SDRAM
RA1616
DDR_A[0-12]
RA1625
DDR_BA[0]
SDRAM_A[0-12]
DDR_BA[1]
to
SDRAM_A[14-17]
DDR_CS[0]
RA1628
R1642
SDRAM_CKE
DDR_CKE
SDRAM_RAS_L
DDR_RAS_L
SDRAM_CAS_L
R1601
DDR_CAS_L
SDRAM_WE_L
DDR_WE_L
to
R1604
SDRAM_CLK[0]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
R1613
DDR_CLK[1]
SDRAM_CLK_L[1]
DDR_CLK_L[1]
to
R1616
R1653
SDRAM_DQM[0] to [3]
DDR_DQM[2],[3]
SDRAM_DQS[0] to [3]
DDR_DQS[2],[3]
to
R1660
ATAPI IF
ATA_RESET
ATA_DAT[0-15]
RA2201
to
ATA_ADD[0-2]
ATA_A0, ATA_A1, ATA_A2
RA2205
ATA_DIOW[L]
ATA_DIOR[L]
ATA_DMAACK[L]
ATA_ADD[0-4]
ATA_DMARQ
ATA_IORDY
RA2206
ATA_INTRQ
RA2207
IC1601
DDR SDRAM
DDR_CLK[0]
DDR_CLK_L[0]
DDR_DQM[0],[1]
DDR_DQS[0],[1]
HD_AT[0] to [15]
RSTATA
TO
DVD
Recorder
Unit
DMARQ, DIOW, DIOR
IORDY, DMACK, INT_ATA
ATA_A0, ATA_A1, ATA_A2
CS1FX, CS3FX
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