Page 1 User's Manual PCL6113/6123/6143 Pulse Control LSI Nippon Pulse Motor Co., Ltd.
Page 2 [Preface] Thank you for considering our pulse control LSI, the "PCL6100 series." Before using the product, read this manual to become familiar with the product. Please note that the section "Precautions for handling," which include details about installing this IC, can be found at the end of this manual.
Page 3: Table Of Contents
1-1. Outline ............................... 1 1-2. Features ............................1 2. Specifications ............................4 3. Terminal Assignment Diagram ........................5 3-1. PCL6113............................5 3-2. PCL6123 ............................5 3-3. PCL6143 ............................6 4. Function of Terminals ..........................7 5. Block Diagram ............................14 6.
Page 4 8. Registers ..............................31 8-1. Table of registers..........................31 8-2. Pre-registers ........................... 32 8-3. Description of the registers ......................34 8-3-1. PRMV (RMV) registers......................34 8-3-2. PRFL (RFL) registers ....................... 34 8-3-3. PRFH (RFH) registers ......................34 8-3-4. PRUR (RUR) registers ......................34 8-3-5.
Page 5 12-5-4. 8-bits I/F 4) (IF1 = H, IF0 = H) Z80 ..................105 12-6. Operation timing (common for all axes) ..................106 13. External Dimensions ........................... 110 13-1. PCL6113............................110 13-2. PCL6123 ............................111 13-3. PCL6143 ............................. 112 - iv -...
Page 6 Appendix: List of various items ......................... 113 Appendix 1: List of commands......................113 Appendix 2: Label list ........................... 115 Handling Precautions..........................123 1. Design precautions .......................... 123 2. Precautions for transporting and storing LSIs.................. 123 3. Precautions for installation....................... 123 4.
Page 7: Outline And Features
1. Outline and Features 1-1. Outline The PCL6113, PCL6123, PCL6143 are CMOS LSIs designed to provide the oscillating, high-speed pulses needed to drive stepper motors and servomotors (pulse string input types). It can offer various types of control over the pulse strings and therefore the motor performance. These include continuous operation, positioning, zero return at a constant speed, linear acceleration/deceleration, and S-curve acceleration/deceleration. The number of control axes is as follows: one for the PCL6113, two for the PCL6123, and 4 for the PCL6143. They offer linear interpolation of multiple axes (using single or multiple PCLs), confirmation of a PCL's operation status, and interrupt output by a variety of conditions. In addition, they are equipped with servomotor driver control features. These functions can be used with simple commands. The intelligent design philosophy reduces the burden on the CPU units to control motors. 1-2. Features ♦ Single voltage power supply 3.3 V These PCLs can be operated from a 3.3 V (±10%) single voltage power supply. The output signal level range is 0 to 3.3 V. The input signal level range is 0 to 3.3 V, or 0 to 5 V. ♦ Super high-speed pulse train output 9.8 Mpps can be output when using a 19.6608 MHz (standard) reference clock, or 15 Mpps when using a 30 MHz (maximum) reference clock. ♦ CPU-I/F These PCLs all contain integral interface circuits for four different CPU types, and they can be connected to a wide variety of CPUs. Examples of CPU types: Z80, 8086, H8, or 68000 etc. ♦ Acceleration/deceleration speed control Linear acceleration/deceleration and S-curve acceleration/deceleration are available. Linear acceleration/deceleration can be inserted in the middle of an S-curve acceleration/deceleration curve. (Specify the S-curve range.) The S-curve range can specify each acceleration and deceleration independently. Therefore, you can create an acceleration/deceleration profile that consists of linear acceleration and S-curve deceleration, or vice versa. ♦ Interpolation These PCLs can perform linear interpolation (offering synchronized operation) of any number of axes. ♦ Speed override In single axis operation, the speed can be changed during operation in any of the operation modes. However, the speed cannot be changed during linear interpolation. ♦ Overriding target position 1) and 2) 1) The target position (feed amount) can be changed while feeding in the positioning mode. If the current position exceeds the newly entered position, the motor will decelerate, stop (immediate stop when already feeding at a low speed), and then feed in the reverse direction.
Page 8 on a deceleration) can be written while executing the current data. When the current operation is complete, the system will immediately execute the next operation. ♦ A variety of counter circuits The following four counters are available separately for each axis. Counter Use or purpose Counter Input/Output COUNTER1 28-bit counter for control of the command position Outputs pulses, EA/EB input COUNTER2 28-bit counter for mechanical position control Outputs pulses, EA/EB input Both of them can also be latched by writing a command, or by providing an LTC, or ORG signal. The PCLs can also be set to reset automatically soon after latching these signals. ♦ Comparator There are 2 comparator circuits for each axis. They can be used to compare target values and internal counter values. Comparator 1 can be compared with COUNTER1 and Comparator 2 can be compared with COUNTER2. ♦ Simultaneous start function Multiple axes controlled by the same LSI, or controlled by multiple sets of this LSI, can be started at the same time. ♦ Simultaneous stop function Multiple axes controlled by the same LSI, or controlled by multiple sets of this LSI, can be stopped at the same time by a command, by an external signal, or by an error stop on any axis. ♦ Manual pulsar input function By applying manual pulse signals, you can rotate a motor directly. The input signals can be 90˚ phase difference signals (1x, 2x, or 4x) or up and down signals. When an EL signal of the feed direction is input, the PCL stops the output of pulses. But, it can feed in the opposite direction without any command.
Page 9 EZ signal is received. ♦ Mechanical input signals The following four signals can be input for each axis. 1) +EL: When this signal is turned ON, while feeding in the positive (+) direction, movement on this axis stops immediately (with deceleration). When this signal is ON, no further movement occurs on the axis in the positive (+) direction. (The motor can be rotated in the negative (-) direction.) 2) -EL: Functions the same as the +EL signal except that it works in the negative (-) direction. 3) SD: This signal can be used as a deceleration signal or a deceleration stop signal, according to the software setting. When this is used as a deceleration signal, and when this signal is turned ON during a high speed feed operation, the motor on this axis will decelerate to the FL speed. If this signal is ON and movement on the axis is started, the motor on this axis will run at the FL low speed. When this signal is used as a deceleration stop signal, and when this signal is turned ON during a high speed feed operation, the motor on this axis will decelerate to the FL speed and then stop. 4) ORG: Input signal for a zero return operation. For safety, make sure the +EL and -EL signals stay on from the EL position until the end of each stroke. The input logic for these signals can be changed using the ELL terminal. The input logic of the SD and ORG signals can be changed using software. ♦ Servomotor I/F The following three signals can be used as an interface for each axis. 1) INP: Input positioning complete signal that is output by a servomotor driver. 2) ERC: Output deflection counter clear signal to a servomotor driver. 3) ALM: Regardless of the direction of operation, when this signal is ON, movement on this axis stops immediately (deceleration stop). When this signal is ON, no movement can occur on this axis. While the PCL is operating in the timer mode, it cannot be stopped using the ALM input. Even though the PCL is stopped, it will output an INT (interrupt request) when an ALM signal is received. The input logic of the INP, ERC, and ALM signals can be changed using software. The ERC signal is a pulsed output. The pulse length can be set. (12 µsec to 104 msec. A level output is also available.) ♦ Output pulse specifications Output pulses can be set to a common pulse, 2-pulse mode or 90 phase difference mode. The output logic can also be selected. ♦ Emergency stop signal ( ) input When this signal is turned ON, movement on all axes stops immediately. While this signal is ON, no movement is allowed on either axes. This input cannot be disabled. The PCL will stop when this signal is present, even it is in the timer mode. ♦ Interrupt signal output An ...
Page 10: Specifications
2. Specifications Item Description Number of control axes PCL6113: One PCL6123: Two (X and Y axes) PCL6143: Four (X, Y, Z, and U axes) Reference clock Standard: 19.6608 MHz (Max. 30 MHz) Positioning control range -134,217,728 to +134,217,727 (28-bit) Ramping-down point 0 to 16,777,215 (24-bit) setting range Number of registers used Two for each axis (FL and FH) for setting speeds Speed setting step range 1 to 16,383 (14-bits) Speed multiplication 0.3x to 600x (Below are examples with a 19.6608 MHz reference clock.) range When 0.3x is selected: 0.3 to 4,914.9 pps When 1x is selected: 1 to 16,383 pps When 600x is selected: 600 to 9,829,800. pps The available pulse speed range varies with the reference clock speed. When the reference clock is 30 MHz and if multiplication rate is 600x, the maximum speed will be 15 Mpps. Acceleration/deceleration Selectable acceleration/deceleration pattern for both increasing and decreasing characteristics speed separately, using Linear and S-curve acceleration/deceleration. Acceleration rate setting 1 to 16,383 (14-bits) range Deceleration rate setting 1 to 16,383 (14-bits) range Ramping-down point The automatic setting is only available when the acceleration and deceleration automatic setting...
Page 11: Terminal Assignment Diagram
3. Terminal Assignment Diagram 3-1. PCL6113 3-2. PCL6123 - - 5...
Page 12: Pcl6143
3-3. PCL6143 Note: On the actual products, a mark similar to an indexing mark (O mark) may be printed on the LSI for production reasons. The model name and the position of the 1st terminal are as shown in the terminal allocation drawings. You can also identify the 1st terminal by the position of the O mark. - - 6...
Page 13: Function Of Terminals
4. Functions of Terminals Note 1: The letter "n" at the end of each signal name stands for an axis name (x, y, z, or u). (Ex.: ELLn etc.) Note 2: In the "IN/OUT" column, "IN" indicates an input terminal and "OUT" indicates an output terminal. "I/O" indicates a bi-directional terminal. Note 3: The logic column indicates the signal logic: Positive or Negative. "P" and "N" are default initial values that can be changed with software. "H" is a hardware setting. Note 4: The "Handling" column describes how to deal with terminals when they are not used. (Some terminals must be controlled, even when they are being used.) "OP" means leave open (disconnected). "PU" means pull up. "PD" means pull down. "+V" must be connected to VDD or pulled up. "GN" means a connection to GND. The pull up/down resistance values should be in the range of 5 k to 10 k-ohms. Terminal No. Input/ Treat Signal name Logic Description output -ment 6113 6123 6143 11, 20, 12, 21, Power Supply a negative power. 30, 44, 31, 45, source Make sure to connect all of these terminals. 56, 66, 57, 67, 81, 93, 83, 93, 103, 114, 107, 70, 80 129, 155, 3, 14, 3, 15, 3, 16,...
Page 14 Terminal No. Input/ Treat Signal name Logic Description output -ment 6113 6123 6143 Input Enter the CPU-I/F mode Input Negative When the signal level on this terminal is LOW, the and terminals will be valid. Input Negative Connect the I/F signals to the CPU. The and terminals are valid when terminal is LOW. Input Positive Address control signals For details about terminal A0, see the section describing the IF1 and IF0 terminals. Output Negative OP Outputs an interrupt request signal to a CPU. There is three types of interrupt signals: a stop interrupt, error interrupt, and an event interrupt. The interrupt type can be determined by reading the main status. Each interrupt will be reset by reading the main status, REST (error interrupt cause) register, or RIST (event interrupt cause) register.
Page 15 Terminal No. Input/ Treat Signal name Logic Description output -ment 6113 6123 6143 Input/ Positive Bi-directional data bus. D0 to D3 15 to 16 to 19 17 to 20 Output When connecting a 16-bit data bus, connect the lower 8 signal lines here. D4 to D7 20 to 21 to 24 22 to 25 D8 to D11 25 to 26 to 29 27 to 30 Input/ Positive PU Bi-directional data bus. Output When connecting a 16-bit data bus, connect the upper 8 signal lines here. D12 to D15 30 to 31 to 34 32 to 35 When IF0 and IF1 are HIGH, pull these signals down to GND or up to VDD. (A single resistor can be used by combining the lines.)
Page 16 Terminal No. Input/ Treat Signal name Logic Description output -ment 6113 6123 6143 X: 125 X: 171 Input Specify the input logic for the ±EL signal. (ELLn) Y: 126 Y: 172 LOW: The input logic on ±EL is positive. Z: 173 HIGH: The input logic on ±EL is negative. U: 174 X: 36 X: 37 Input Input end limit signal in the positive (+) (+ELn) Y: 73 Y :68 direction. Z: 99 When this signal is ON while feeding in the U: 130 positive (+) direction, the motor on that axis will stop immediately or will decelerate and stop. Specify the input logic using the ELL terminal. The terminal status can be checked using an SSTSW command signal (sub status). X: 37 X: 38 Input Input end limit signal in the negative (-)
Page 17 Terminal No. Input/ Treat Signal name Logic Description output -ment 6113 6123 6143 X: 42 X: 43 Input Input the position complete signal from servo (INPn) Y: 79 Y: 74 driver. (in-position signal) Z: 105 The input logic can be changed using U: 136 software. The terminal status can be checked using an RSTS command signal. X: 43 X: 44 Input Latch counter value of COUNTER 1, (LTCn) Y: 80 Y: 75 COUNTER2. Z: 106 The input logic can be changed using U: 137 software. The terminal status can be checked using an RSTS command signal. X: 45 X: 46 Input Input this signal when you want to control the...
Page 18 Terminal No. Input/ Treat Signal name Logic Description output -ment 6113 6123 6143 P0/FUP X: 52 X: 53 Input/ Common terminal for general purpose I/O and (P0n/FUPn) Y: 89 Y: 84 Output FUP. Z: 115 When this terminal is used as a general- U: 146 purpose I/O, you can set it for input or output. When used as an FUP terminal, it will output a signal while accelerating. The FUP output logic can be set using software. P1/FDW X: 53 X: 54 Input/ Common terminal for general purpose I/O and (P1n/FDWn) Y: 90 Y: 85 Output FDW. Z: 116 When this terminal is used as a general- U: 147 purpose I/O, you can set it for input or output.
Page 19 Terminal No. Input/ Treat Signal name Logic Description output -ment 6113 6123 6143 X: 60 X: 61 Input/ This is a general-purpose terminal. (P7n) Y: 97 Y: 92 Output Set it for use as input or output terminal using Z: 123 software. U: 154 X: 62 X: 63 Output N Outputs command pulses for controlling a (OUTn) Y: 99 Y: 94 motor. Z: 125 U: 156 The output specifications are determined by selecting the common pulse mode, 2-pulse X: 63 X: 64 mode, or 90˚ phase difference mode. (DIRn) Y: 100 Y: 95...
Page 20: Block Diagram
5. Block Diagram - 14 -...
Page 21: Cpu Interface
6. CPU Interface 6-1. Setting the CPU interface type These PCLs contain the following 4 CPU interface types, in order to facilitate connection to various CPUs. To select a specific type, use the IF0 and IF1 terminals. Shown below are some circuit examples. To use some other CPU, select the appropriate interface after referring to section "12-5. AC characteristics." [Example of connections for CPU signals] Setting CPU signal to connect to the 6045A terminals Interface status CPU type Name terminal terminal A0 terminal terminal 16-bit I/F-1 68000 +3.3V 16-bit I/F-2 (GND) 16-bit I/F-3 8086 (GND) READY 8-bit I/F 16-bit I/F-1: A 16-bit interface with a R/W mode input, strobe input, and acknowledge output. The lower addresses correspond to the upper word in the I/O buffer. Convenient for use with VME bus and 68000 series CPUs. 16-bit I/F-2: A 16-bit interface with an RD input and a WR input. The lower addresses correspond to the upper word in the I/O buffer. Convenient for H8 series CPUs. 16-bit I/F-3: A 16-bit interface with an RD input and a WR input. The lower addresses correspond to the lower word in the I/O buffer. Convenient for use with 8086 series CPUs. 8-bit I/F: An 8-bit interface with an RD input and a WR input. The lower addresses correspond to the lower word in the I/O buffer. Convenient for use with Z80 series CPUs. 6-2. Hardware design precautions • ...
Page 22: Examples Of Cpu Interfaces
A5-A23 CS IF0 A1-A4 A1-A4 D0-D15 D0-D15 LDS DTACK Interrupt IPL0-IPL2 control circuit +3.3V RESET System reset Note: The PCL6113 uses A1 to A2. The PCL6123 uses A1 to A3. The PCL6143 uses A1 to A4. (2) 16-bit I/F-2 (IF1 = L, IF0 = H) PCL6143 H8 +3.3V A5-A15 CS Decode circuit IF0 IF1 A1-A4 A1-A4 IRQ RD HWR WAIT ...
Page 23 A1-A4 Latch A16-A19 GND AD0-AD15 GND D0-D15 Interrupt INTR control INTA circuit WR READY RESET MN/MX +5V System reset System reset Note: The PCL6113 uses A1 to A2. The PCL6123 uses A1 to A3. The PCL6143 uses A1 to A4. (4) 8-bit I/F (IF1 = H, IF0 = H) PCL6143 Z80 +3.3V CS Decode A5-A7 circuit IF1 IF0 A0-A4 A0-A4 INT IORQ INT RD WR RD WR WAIT D0-D7...
Page 24: Address Map
6-4. Address map 6-4-1. Axis arrangement map In this LSI, the control address range for each axis is independent. It is selected by using address input terminal A3 and A4, as shown below. Detail Note: The table on the left is for the PCL6143. X axis control address range The PCL6123 does not have an A4 address Y axis control address range line. Only the X and Y axes are available. Z axis control address range The PCL6113 does not have A4 or A3 address U axis control address range lines. Only the X axis is available. 6-4-2. Internal map of each axis The internal map of each axis is defined by A0, A1 and A2 address line inputs. <When 16-bit I/F-1 or 16-bit I/F-2 mode is selected> 1) Write cycle A1 to A2 Address signal Processing detail COMW Specify an axis, write a control command. Change the status of the general-purpose output port (only bits OTPW assigned as outputs are effective) BUFW0 Write to the input/output buffer (bits 0 to 15) BUFW1 Write to the input/output buffer (bits 16 to 31) 2) Readout cycle A1 to A2 Address signal Processing detail MSTSW Read the main status (bits 0 to 15) SSTSW Read the sub status and general-purpose I/O port.
Page 25 <When 8-bit I/F mode is selected> 1) Write cycle A0 to A2 Address signal Processing detail COMB0 Write control commands COMB1 Specify an axis (specify control command execution axis) Change the status of the general-purpose output port (only bits OTPB assigned as outputs are effective) (Invalid) BUFB0 Write to the input/output buffer (bits 0 to 7) BUFB1 Write to the input/output buffer (bits 8 to 15) BUFB2 Write to the input/output buffer (bits 16 to 23) BUFB3 Write to the input/output buffer (bits 24 to 31) 2) Read cycle A0 to A2 Address signal Processing detail MSTSB0 Read the main status (bits 0 to 7) MSTSB1 Read the main status (bits 8 to 15) IOPB Read the general-purpose output port SSTSB Read the sub status BUFB0 Read from the input/output buffer (bits 0 to 7) BUFB1 Read from the input/output buffer (bits 8 to 15)
Page 26: Description Of The Map Details
There are two methods to write to a register, as follows: Mixed use of these methods is allowed. The example below uses the PCL6143. (1) Commands and data I/O are written as one set per axis, and a total of up to 4 sets can be used. In this case, the axis specification (COMB1), other than starting or stopping an interpolation operation, is performed using 00h. However, if CSTA and CSTP signals are used to start or stop an interpolation operation, 00h can also be used for this command. When using multiple sets of PCL6113, 6123, and 6143 LSIs, a common program can be created easily. A1 to A4 Symbol Description 0000 COMW_X X axis command...
Page 27: Write To An Output Port (Otpw, Otpb)
A1 to A4 Symbol Description 0000 COMW Command 0010 BUFW0_X X axis I/O buffer (bit 0 to 15) 0011 BUFW1_X X axis I/O buffer (bit 16 to 31) 0110 BUFW0_Y Y axis I/O buffer (bit 0 to 15) 0111 BUFW1_Y Y axis I/O buffer (bit 16 to 31) 1010 BUFW0_Z Z axis I/O buffer (bit 0 to 15) 1011 BUFW1_Z Z axis I/O buffer (bit 16 to 31) 1110 BUFW0_U U axis I/O buffer (bit 0 to 15) 1111 BUFW1_U U axis I/O buffer (bit 16 to 31) Note: The examples above use COMW on the X axis. However, using COMW on any other axis will perform the identical operation.
Page 28: Reading The Main Status (Mstsw, Mstsb)
6-5-4. Reading the main status (MSTSW, MSTSB) MSTSW MSTSB1 MSTSB0 SPRF SEOR SCP2 SCP1 SSC1 SSC0 SINT SERR SEND SENI SRUN SSCM Bit name Details SSCM Set to 1 by writing a start command. Set to 0 when the operation is stopped. SRUN Set to 1 by the start pulse output. Set to 0 when the operation is stopped. SENI Stop interrupt flag When IEND in RENV2 is 1, the PCL turns ON the INT output when the status changes from operating to stop, and the SENI bit becomes 1. (After the main status is read, it returns to 0.) When IEND is set to 0, this flag will always be 0. SEND Set to 0 by writing start command. Set to 1 when the operation is stopped. SERR Set to 1 when an error interrupt occurs. Set to 0 by reading the RESET. SINT Set to 1 when an error interrupt occurs. Set to 0 by reading the RIST. 6 to 7 SSC0 to 1 Sequence number for execution or stopping. SCP1 Set to 1 when the COMPARATOR 1 comparison conditions are met. SCP2 Set to 1 when the COMPARATOR 2 comparison conditions are met. 10 to 12 Not defined (always 0) SEOR...
Page 29: Reading The Sub Status And Input/Output Port (Sstsw, Sstsb, Iopb)
3) When the DR continuous mode (MOD=02h) is selected. Start command Stop command Reading main status SSCM SRUN SENI SEND 4) When the auto stop mode is selected such as positioning operation mode (MOD=41h). Start command Reading main status SSCM SRUN SENI SEND 6-5-5. Reading the sub status and input/output port (SSTSW, SSTSB, IOPB) SSTSW SSTSB IOPB 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SSD SORG SMEL SPEL SALM SFC SFD SFU IOP7 IOP6 IOP5 IOP4 IOP3 IOP2 IOP1 IOP0 Bit name Description 0 to 7 IOP0 to 7 Read the status of P0 to 7 (0: L level, 1: H level) Set to 1 while accelerating. Set to 1 while decelerating. Set to 1 while feeding at low speed. SALM Set to 1 when the ALM input is ON. SPEL Set to 1 when the +EL input is ON. SMEL Set to 1 when the -EL input is ON. SORG Set to 1 when the ORG input is ON. Set to 1 when the SD input is ON. (Latches the SD signal.) - 23 -...
Page 30: Commands (Operation And Control Commands)
7. Commands (Operation and Control Commands) 7-1. Operation commands After writing the axis assignment data to COMB1 (address 1 when an 8-bit-I/F is used), write the command to COMB0 (address 0 when an 8-bit-I/F is used), the LSI will start and stop, as well as change the speed of the output pulses. When any other interface mode is selected, the PCL will write 16-bit data including axis specifications and commands. 7-1-1. Procedure for writing an operation command (the axis assignment is omitted) Write a command to COMB0. A waiting time of 4 register reference clock cycles (approximately 0.2 µsec when CLK = 19.6608 MHz) is required for the interval between "writing a command" and "writing the next command," "writing a register" and "writing the I/O buffer," and between "reading a register" and "reading the I/O buffer." When the output signal is used by connecting it to the CPU, the CPU automatically ensures this waiting time. If you want to use a CPU that does not have this waiting function, arrange the program sequence so that access is only allowed after confirming that the output signal is HIGH. 1) When not using A0 to A2 Next command address Command Command D to D7 Secure 4reference colock cycles by the software 2) When not using 7-1-2. Start command 1) Start command If this command is written while stopped, the motor will start rotating. If this command is written while the motor is operating, it is taken as the next start command. COMB0 Symbol Description STAFL FL low speed start STAFH FH low speed start STAD High speed start 1 (FH low speed -> deceleration stop) Note. 1 STAUD High speed start 2 (Acceleration -> FH low speed -> Deceleration stop) Note. 1 Note 1: For details, see section 10-1, "Speed patterns."...
Page 31: Speed Change Command
2) Residual pulses start command Write this command after the motor is stopped on the way to a positioning, it will continue movement for the number of pulses left in the deflection counter. COMB0 Symbol Description CNTFL Residual pulses FL low speed start CNTFH Residual pulses FH low speed start CNTD High speed start 1 residual pulses (FH constant speed -> Deceleration stop) CNTUD High speed start 2 residual pulses (Acceleration -> FH constant speed -> Deceleration stop) 3) Simultaneous start command By setting the RMD register, the LSI will start an axis which is waiting for signal. COMB0 Symbol Description CMSTA Output one shot of the start pulse from the terminal. SPSTA Only this axis will process the command, the same as when the signal is input. 7-1-3. Speed change command Write this command while the motor is operating, the motor on that axis will change its feed speed. If this command is written while stopped it will be ignored. COMB0 Symbol Description FCHGL Change to the FL speed immediately. FCHGH Change to the FH speed immediately. FSCHL Decelerate and change to the FL speed. FSCHH Accelerate and change to the FH speed.
Page 32: General-Purpose Output Bit Control Commands
7-2. General-purpose output bit control commands These commands control the individual bits of output terminals P0 to P7. When the terminals are designated as outputs, the LSI will output signals from terminals P0 to P7. Commands that have not been designated as outputs are ignored. The write procedures are the same as for the Operation commands. In addition to this command, by writing to a general-purpose output port (OTPB: Address 2 when an 8-bit- I/F is used), you can set 8 bits as a group. See section 7-5, "General-purpose output port control." COMB0 Symbol Description COMB0 Symbol Description P0RST Make P0 LOW. P0SET Make P0 HIGH. P1RST Make P1 LOW. P1SET Make P1 HIGH. P2RST Make P2 LOW. P2SET Make P2 HIGH. P3RST Make P3 LOW. P3SET Make P3 HIGH. P4RST Make P4 LOW. P4SET Make P4 HIGH. P5RST Make P5 LOW. P5SET Make P5 HIGH. P6RST Make P6 LOW. P6SET Make P6 HIGH.
Page 33: Control Command
7-3. Control command Set various controls, such as the reset counter. The procedures for writing are the same as the operation commands. 7-3-1. Software reset command Used to reset this LSI. COMB0 Symbol Description SRST Software reset. (Same function as making the terminal LOW.) 7-3-2. Counter reset command Reset counters to zero. COMB0 Symbol Description CUN1R Reset COUNTER1. CUN2R Reset COUNTER2. 7-3-3. ERC output control command Control the ERC signal using commands. COMB0 Symbol Description ERCOUT Outputs the ERC signal. ERCRST Resets the output when the ERC signal output is specified to a level type output. 7-3-4. Pre-register control command Cancel the pre-register settings. See section "8-2. Pre-register" in this manual for details about the pre-register. COMB0 Symbol Description PRECAN Cancel the operation pre-register. 7-3-5. PCS input command Entering this command has the same results as inputting a signal on the PCS terminal. COMB0 Symbol Description...
Page 34: Register Control Command
7-4. Register control command By writing a Register Control command to COMB0 (Address 0 when an 8-bit-I/F is used), the LSI can copy data between a register and the I/O buffer. Note: When using the I/O buffer while responding to an interrupt, a precaution is required, reading the I/O buffer contents before using it and returning it to its original value after use. 7-4-1. Procedure for writing data to a register (the axis assignment is omitted) 1) Write the data that will be written to a register into the I/O buffer (addresses 4 to 7 when an 8-bit-I/F is used). The order in which the data is written does not matter. However, secure two reference clock cycles between these writings. 2) Then, write a "register write command" to COMB0 (address 0 when an 8-bit-I/F is used). After writing one set of data, wait at least two cycles (approx. 0.2 sec when CLK = 19.6608 MHz) before writing the next set of data. In both case 1) and case 2), when the output is connected to the CPU, the CPU wait control function will provide the waiting time between write operations automatically. 7-4-2. Procedure for reading data from a register (the axis assignment is omitted) 1) First, write a "register read out command" to COMB0 (address 0 when an 8-bit-I/F is used). 2) Wait at least four reference clock cycles (approx. 0.2 µsec when CLK = 19.6608 MHz) for the data to be copied to the I/O buffer. 3) Read the data from the I/O buffer (addresses 4 to 7 when an 8-bit-I/F is used). The order for reading data from the I/O buffer does not matter. There is no minimum time between read operations. When the output is connected to the CPU, the CPU wait control function will provide the waiting time between write operations automatically. - 28 -...
Page 35: Table Of Register Control Commands
7-4-3. Table of register control commands Register Pre-register Detail Read command Write command Read command Write command Name Name COMB0 Symbol COMB0 Symbol COMB0 Symbol COMB0 Symbol 1 Feed amount PRMV RPRMV WPRMV RRMV WRMV RRFL WRFL PRFL RPRFL WPRFL 2 Initial speed 3 Operation speed RRFH WRFH PRFH RPRFH WPRFH 4 Acceleration rate RRUR WRUR PRUR...
Page 36: General-Purpose Output Port Control Command
7-5. General-purpose output port control command By writing an output control command to the output port (OTPB: Address 2 when using an 8-bit-I/F interface), the PCL will control the output of the P0 to P7 terminals. When the I/O setting for P0 to P7 is set to output, the PCL will output signals from terminals P0 to P7 to issue the command. When writing words to the port, the upper 8 bits are discarded. However, they should be set to zero to maintain future compatibility. The output status of terminals P0 to P7 are latched, even after the I/O setting is changed to input. The output status for each terminal can be set individually using the bit control command. 7-5-1. Command writing procedures Write control data to output port (OTPB: Address 2 when an 8-bit-I/F is used). To continue with the next command, the LSI must wait for four reference clock cycles (approx. 0.2 µsec when CLK = 19.6608 MHz). The terminal outputs a wait request signal. 7-5-2. Command bit allocation OTP7 OTP6 OTP5 OTP4 OTP3 OTP2 OTP1 OTP0 Output P0 Output P1 Output P2 Output P3 0: Low level 1: High level Output P4 Output P5 Output P6 Output P7 - 30 -...
Page 37: Registers
8. Registers 8-1. Table of registers The following registers are available for each axis. 2nd pre- Register Details register name length name R/W Feed amount, target position PRMV R/W Initial speed PRFL R/W Operation speed PRFH R/W Acceleration rate PRUR R/W Deceleration rate PRDR R/W Speed magnification rate PRMG R/W Ramping-down point PRDP R/W Operation mode PRMD R/W Main axis feed amount during linear interpolation PRIP R/W S-curve acceleration range PRUS R/W S-curve deceleration range PRDS RENV1...
Page 38: Pre-Registers
8-2. Pre-registers The following registers and start commands have pre-registers: RMV, RFL, RFH, RUR, RDR, RMG, RDP, RMD, RIP, RUS and RDS. The term pre-register refers to a register which contains the next set of operation data while the current step is executing. This LSI has the following 2-layer structure and executes FIFO operation. Normally, operation data are written into the pre-register. To change the current operation status, such as changing the speed, the new data are written into the register. The data will be shifted (copied) from the pre-register to the register when the next start command is written, or at the end of an operation. One set of operation data uses multiple pre-registers (PRMV, PRFH,,,,). If the current operation completes before the next set of operation data has been placed in all of the pre-registers, the PCL may start with incomplete data. In order to prevent this problem, the "determined/not determined" status is used. When a start command is written, the other operation data is considered to be determined, and the PCL will continue its operation immediately after the current operation is complete. The writing and operating procedures for the pre-registers are shown below. 1) When both the pre-register and register are Procedure Pre-register Register SPRF empty, data that is written to the pre-register 0 Not 0 Not will also be written to the register. (Data 1 not determined determined determined status). determined determined 2) By writing a start command, the contents of the data 1 data 1 register are declared determined and the PCL will start the operation. Determined determined data 1 data 1 3) During operation, write the next operation data to the pre-register. (A subsequent set of data Determined...
Page 39 In step (5) above, the data in the pre-register is "not determined," allowing you to write the next set of operation data. Data written to the pre-register when the data in the pre-register is already "determined" will be ignored. When the pre-register is declared to be determined, the SPRF bit in the main status (MSTSW) register will be 1. Also, the PCL can be set to output an signal when the pre-register changes from determined to not determined status by setting the RIRQ (event interrupt cause) register. Further, in any of the following cases, the pre-register has a "not determined" status, so that you can cancel a continuous start when the current operation is finished. 1) Writing a pre-register cancel command (26h). 2) A stop ordered by using the immediate stop command (49h) or deceleration stop command (4Ah). While in a positioning operation, when the deceleration stop command is written during auto deceleration, the PCL will go to the target position. However, the pre-register is declared "not determined" and the next operation will be cancelled. 3) When the PCL stops because of an error (When any of the bits 0 to 6 in the RESET register changes to a 1.) Note: To automatically start the next operation using the data already in the pre-register, set the operation complete timing to "end of cycle" (set METM in the RMD to 0). If the "end of pulse" (set METM in the RMD to 1) is selected, the interval between the last pulse and the next operation's start pulse will be narrower: 14 x T (T : Reference clock cycle). For details, see section 11-3-2. "Output pulse length and operation complete timing." - 33 -...
Page 40: Description Of The Registers
8-3.Description of the registers The initial value of all the registers and pre-registers is "0." Please note that with some registers, a value of "0" is outside the allowable setting range. Note 1: Bits marked with an "*" asterisk are ignored when written and return a "0" when read. Note 2: Bits marked with an "&" are ignored when written. They will be the same as the uppermost bit in the empty column when read. (Extended symbols) 8-3-1. PRMV (RMV) registers These registers are used to specify the target position for positioning operations. The set details change with each operation mode. PMV is the register for PRMV. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 & & & & Setting range: -134,217,728 to +134,217,727. By changing the RMV register while in operation, the feed length can be overridden. 8-3-2. PRFL (RFL) registers These pre-registers are used to set the initial speed (stop seed) for high speed (with acceleration /deceleration) operations. RFL is the register for PRFL. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 The setting range is 1 to 16,383. However, the actual speed [pps] may vary with the speed magnification rate setting in the PRMG register. 8-3-3. PRFH (RFH) registers These pre-registers are used to specify the operation speed. RFH is the working register for PRFH. Write to this register to override the current speed. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 The setting range is 1 to 16,383. However, the actual speed [pps] may vary with the speed magnification rate set in the PRMG register. 8-3-4. PRUR (RUR) registers These pre-registers are used to specify the acceleration rate. RUR is the register for PRUR. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Setting range is 1 to 16,383. - 34 -...
Page 41: Prdr (Rdr) Registers
8-3-5. PRDR (RDR) registers These pre-registers are used to specify the deceleration rate. RDR is the register for PRDR. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 The normal setting range is 1 to 16,383. When PRDR = 0, the deceleration rate will be the value set by PRUR. Note: When automatic setting is selected for the ramp down point (MSDP = 0), enter the same value as used for the PRUR, or 0, in this register. 8-3-6. PRMG (RMG) registers These pre-registers are used to set the speed magnification rate. RMG is the register for PRMG. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 * * * * * * * * * * * * * * * * * * * * The setting range is 1 to 4,095. Sets the relationship between the speed register PRFL (RFL), PRFH (RFH) values and the operation speeds. The actual operation speed [pps] is a product of the speed magnification rate and the speed register setting. [Setting example when the reference clock is 19.6608 MHz] Speed Speed Operation speed Operation speed setting Setting magnification Setting magnification setting range [pps] range [pps] rate rate 3999 (0F9Fh) 0.3 to 4,914.9 59 (003Bh) 20 to 327,660 2399 (095Fh) 0.5 to 8,191.5 23 (0017h) 50 to 819,150 1199 (04AFh) 1 to 16,383 11 (000Bh) 100 to 1,638,300...
Page 42: Prmd (Rmd) Registers
8-3-8. PRMD (RMD) registers These pre-registers are used to set the operation mode. RMD is the register for PRMD. Bits Bit name Description Setting basic operation mode Set operation mode. 0 to 6 000 0000 (00h): Continuous positive rotation controlled by command control. 000 1000 (08h): Continuous negative rotation controlled by command control. 000 0001 (01h): Continuous operation controlled by pulsar (PA/PB) input. 000 0010 (02h): Continuous operation controlled by external signal (+DR/-DR) input. 001 0000 (10h): Positive rotation zero return operation. 001 1000 (18h): Negative rotation zero return operation. 100 0001 (41h): Positioning operation (specify the incremental target position) 100 0111 (47h): Timer operation 101 0001 (51h): Positioning operation controlled by pulsar (PA/PB) input. 101 0110 (56h): Positioning operation controlled by external signal (+DR/-DR) input. 110 0010 (62h): Continuous linear interpolation 110 0011 (63h): Linear interpolation (Always set 0) defined Optical setting items MSDE 0: SD input will be ignored. (Checking can be done with RSTS in sub status) 1: Decelerates (deceleration stop) by turning ON the input. MINP 0: Delay using an INP input will be possible. (Checking can be done with RSTS in sub status) 1: Completes operation by turning ON the INP input. MSMD Specify an acceleration/deceleration type for high speed feed. (0: Linear accel/decel. 1: S-curve accel/decel.) MCCE 1: Stop counting output pulses on COUNTER1 and 2. This is used to move a mechanical part without changing the PLC control position When the counter input selection (RENV3: CIS1, CIS2) is set to EA/EB, the PCL will not stop counting when this bit is set. METM Specify the operation complete timing. (0: End of cycle. 1: End of pulse.) When selecting continuous operation using the pre-register, select "end of cycle."...
Page 43: Prip (Rip) Registers
Bits Bit name Description 18 to 19 MSY0 to 1 After writing a start command, the LSI will start an axis synchronization operation based on other timing. 00: Start immediately. 01: The PCL starts on a input (or command 06h, 2Ah). 10: Start with an internal synchronous start signal. 11: Start when a specified axis stops moving. 20 to 23 MAX0 to 3 Specify an axis to check for an operation stop when the value of MSY 0 to 1 is 11. Setting examples 0001: Starts when the X axis stops. 0010: Starts when the Y axis stops. 0100: Starts when the Z axis stops. 1000: Starts when the U axis stops. 0101: Starts when both the X and Z axes stop. 1111: Starts when all axes stop. MSPE 1:Deceleration stop or immediate stop by input. This is used for a simultaneous stop with another axis when this other axis stops with an error. MSPO 1: Outputs a (simultaneous stop) signal when stopping due to an error. MADJ Specify an FH correction function. (0: ON. 1: OFF.) (Always set 0) defined MCDE 1: Decelerates when input goes LOW. Set this bit to 1 to decelerate simultaneously with other axes. MCDO 1: Outputs a LOW on the terminal when decelerating or at FL constant speed.
Page 44: Prds (Rds) Registers
8-3-11. PRDS (RDS) registers These pre-registers are used to specify the S-curve range of the S-curve deceleration. RDS is the register for PRDS. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 The normal setting range is 1 to 8,191. When 0 is entered, the value of (PRFH - PRFL)/2 will be calculated internally and applied. Note: Specify the same value for the PRUS register when automatic setting of the ramp down point is selected (MSDP = 0). 8-3-12. RENV1 register This register is used for Environment setting 1. This is mainly used to set the specifications for input/output terminals. Bits Bit name Description 0 to 2 PMD0 to 2 Specify OUT output pulse details Specify the process to occur when the EL input is turned ON. (0: Immediate stop. 1: Deceleration stop.) Note 1, 2 Specify the process to occur when the SD input is turned ON. (0: Deceleration only. 1: Deceleration and stop.) SDLT Specify the latch function of the SD input. (0: OFF. 1: ON.) Turns ON when the SD signal width is short. When the SD input is OFF while starting, the latch signal is reset. The latch signal is also reset when SDLT is 0. Specify the SD signal input logic. (0: Negative logic. 1: Positive logic.) ORGL Specify the ORG signal input logic. (0: Negative logic. 1: Positive logic.) ALMM Specify the process to occur when the ALM input is turned ON. (0: Immediate stop. 1: Deceleration stop.) Note 2 ALML Specify the ALM signal input logic. (0: Negative logic. 1: Positive logic.) - 38 -...
Page 45 Bits Bit name Description EROE 1: Automatically outputs an ERC signal when the axis is stopped immediately by a +EL, -EL, ALM, or input signal. However, the ERC signal is not output when a deceleration stop occurs on the axis. EROR 1: Automatically output the ERC signal when the axis completes a zero return. 12 to EPW0 to 2 Specify the pulse width of the ERC output signal. (CLK=19.6608MHz) 000: 12 µsec 100: 13 msec 001: 102 µsec 101: 52 msec 010: 409 µsec 110: 104 msec 011: 1.6 msec 111: Level output ERCL Specify the ERC signal output logic. (0: Negative logic. 1: Positive logic.) 16 to ETW0 to 1 Specify the ERC signal OFF timer time. (CLK=19.6608MHz) 00: 0 µsec 01: 12 µsec 10: 1.6 msec 11: 104 msec STAM Specify the signal input type. (0: Level trigger. 1: Edge trigger.) STPM Specify a stop method using input. (0: Immediate stop. 1: Deceleration stop.) Note 2 20 to FTM 0 to 1 Select features of +EL, -EL, SD, ORG, ALM, and INP filters. 00: Pulse length shorter than 3.2 µsec are ignored. (When CLK=19.6608MHz) 01: Pulse length shorter than 25 µsec are ignored. (When CLK=19.6608MHz) 10: Pulse length shorter than 200 msec are ignored. (When CLK=19.6608MHz) 11: Pulse length shorter than 1.6 msec are ignored. (When CLK=19.6608MHz) INPL Specify the INP signal input logic. (0: Negative logic. 1: Positive logic.) LTCL...
Page 46: Renv2 Register
8-3-13. RENV2 register This is a register for the Environment 2 settings. Specify the function of the general-purpose port, EA/EB input, and PA/PB input. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POFF EOFF CSP0 P7M0 P6M0 P5M0 P4M1 P4M0 P3M1 P3M0 P2M1 P2M0 P1M1 P1M0 P0M1 P0M0 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 IEND ORM EZL EZD3 EZD2 EZD1 EZD0 PDIR PINF PIM1 PIM0 EDIR EINF EIM1 EIM0 Bits Bit name Description 0 to 1 P0M0 to 1 Specify the operation of the P0/FUP terminals 00: General-purpose input 01: General-purpose output...
Page 47 Bits Bit name Description EINF 1: Apply a noise filter to EA/EB/EZ input. Ignores pulse inputs less than 3 CLK signal cycles long. EDIR 1: Reverse the counting direction of the EA/EB inputs. 20 to 21 PIM0 to 1 Specify the PA/PB input operation. 00: Multiply a 90 phase difference by 1 (Count up when the PA input phase is ahead.) 01: Multiply a 90 phase difference by 2 (Count up when the PA input phase is ahead.) 10: Multiply a 90 phase difference by 4 (Count up when PA input phase is ahead.)
Page 48: Renv3 Register
8-3-14. RENV3 register This register holds environment setting 3. Specify the counter function, latch function, and simultaneous start function. Bit name Description CIS1 Enable input counting on COUNTER1 0: Output pulse 1: EA/EB input CIS2 Enable input counting on COUNTER2 0: EA/EB input 1: Output pulse CU1H 1: Stops counting by COUNTER1. CU2H 1: Stops counting by COUNTER2. CU1L 1: Resets COUNTER1 while latching the contents of COUNTER1. LOF1 1: Stop latching the contents of COUNTER1 with the LTC input. (Only effective for software.) CU1R 1: Latches (and resets) COUNTER1 when a zero return operation is complete. C1RM 1: Set COUNTER1 to ring counter operation using Comparator 1. CU2L 1: Resets COUNTER2 while latching the contents of COUNTER2. LOF2 1: Stop latching the contents of COUNTER2 with the LTC input. (Only effective for software.) CU2R 1: Latches (and resets) COUNTER2 when a zero return operation is complete. C2RM 1: Set COUNTER2 to ring counter operation using Comparator 2. 12 to 13 C1S0 to 1 Select a comparison method for Comparator 1 00: Turn the comparator function off. 01: RCMP1 data = Comparison counter 10: RCMP1 data > Comparison counter 11: RCMP1 data < Comparison counter 14 to 15 C2S0 to 1 Select a comparison method for Comparator 2 00: Turn the comparator function off.
Page 49: Rcun1 Register
8-3-15. RCUN1 register This register is used to set and read COUNTER1. Setting range: -134,217,728 to +134,217,727 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 & & & & For details about the counters, see section "11-10. Counters." 8-3-16. RCUN2 register This register is used to set and read COUNTER2. Setting range: -134,217,728 to +134,217,727 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 & & & & 8-3-17. RCMP1 register Specify the comparison data for Comparator 1. Setting range: -134,217,728 to +134,217,727 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 & & & & For details about the counters, see section "11-11. Counters." 8-3-18. RCMP2 register Specify the comparison data for Comparator 2. Setting range: -134,217,728 to +134,217,727 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 & & & & - 43 -...
Page 50: Rirq Register
8-3-19. RIRQ register Enables event interruption cause. Bits set to 1 that will enable an event interrupt for that event. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 IRSA IRDR IRSD IROL IRLT IRC2 IRC1 IRDE IRDS IRUE IRUS IRNM IREN 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Bit name Description IREN Stopping normally. IRNM When enabled to write to the pre-register. IRUS Starting acceleration. IRUE When ending acceleration. IRDS When starting deceleration. IRDE When ending deceleration. IRC1 When Comparator 1 conditions are met. IRC2 When Comparator 2 conditions are met. IRLT When latching the count value with an LTC signal input. (When LOF1 = LOF2 = 1 in RENV3, an interrupt will not occur.) IROL When latching the count value with an ORG signal input.
Page 51: Rsts Register
8-3-22. RSTS register The extension status can be checked. (Read only.) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SINP SDIN SLTC SDRM SDRP SERC SPCS SEMG SSTP SSTA CND3 CND2 CND1 CND0 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 SDIR Bit name Description 0 to 3 CND0 to 3 Reports the operation status. 0000: Under stopped condition 1000: Waiting for PA/PB input. 0001: Waiting for DR input 1010: Feeding at FL low speed. 0010: Waiting for input 1011: Accelerating 0011: Waiting for an internal synchronous 1100: Feeding at FH low speed. signal 1101: Decelerating 0100: Waiting for another axis to stop. 1110: Waiting for INP input. 0101: Waiting for a completion of ERC timer Others: (controlling start/stop) 0110: Waiting for a completion of direction change timer When the ...
Page 52: Rest Register
8-3-23. REST register Used to check the error interrupt cause. (Read only.) The corresponding bit will be "1" when that item has caused an error interrupt. This register is reset when read. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ESPE ESEE ESP0 ESSD ESEM ESSP ESAL ESML ESPL 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Bit name Description ESPL Stopped by the +EL input being turned ON. ESML Stopped by the -EL input being turned ON. ESAL Stopped by turning the ALM input ON, or when an ALM input occurs while stopping. ESSP Stopped by the input being turned ON. ESEM Stopped ...
Page 53: Rpls Register
8-3-25. RPLS register This register is used to check the value of the positioning counter (number of pulses left for feeding). (Read only.) At the start of positioning operation, this value will be the absolute value in the RMV register. Each pulse that is output will decrease this value by one. Data range: 0 to 134,217,728 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 8-3-26. RSPD register This register is used to check the EZ count value and the current speed. (Read only.) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 AS13 AS12 AS11 AS10 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 ECZ3 ECZ2 ECZ1 ECZ0 Bit name Description 0 to 13 AS0 to 13 Read the current speed as a step value (same units as for RFL and RFH). When stopped the value is 0. 14 to 15 Not defined (Always set to 0.) 16 to 19 ECZ0 to 3 Read the count value of EZ input that is used for a zero return. 20 to 31 Not defined (Always set to 0.) 8-3-27. RSDC register This register is used to check the automatically calculated ramping-down point value for the positioning operation. (Read only.) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 0 The setting range will vary with the method used to set the ramp down point.
Page 54: Operation Mode
9. Operation Mode Specify the basic operation mode using the MOD area (bits 0 to 6) in the RMD (operation mode) register. 9-1. Continuous operation mode using command control This is a mode of continuous operation. A start command is written and operation continues until a stop command is written. Operation method Direction of movement Continuous operation from a command Positive direction Continuous operation from a command Negative direction Stop by turning ON the EL signal corresponding to the direction of operation. When operation direction is positive, +EL can be used. When operation direction is negative, -EL is used. In order to start operation in the reverse direction after stopping the motion by turning ON the EL signal, a new start command must be written. 9-2. Positioning operation mode The following 2 operation types are available for positioning operations. Operation method Direction of movement Positioning operation Positive direction when PRMV 0 Negative direction when PRMV < 0 Timer operation (PRMV 0) Positive direction (DIR = H). However, the pulse output is masked. 9-2-1. Positioning operation (MOD: 41h) This is a positioning mode used by placing a value in the PRMV (target position) register. The feed direction is determined by the sign set in the PRMV register. When starting, the RMV register absolute setting value is loaded into the positioning counter (RPLS). The PCL counts down pulses with operations, and when the value of the positioning counter drops to 0, movement on the axes stops. When you set the PRMV register value to zero to start a positioning operation, the LSI will stop outputting pulses immediately. 9-2-2. Timer operation (MOD: 47h) This mode allows the internal operation time to be used as a timer. The internal effect of this operation is identical to the positioning operation. However, the LSI does not output any pulses (they are masked). Therefore, the internal operation time using the low speed start command will be a product of the frequency of the output pulses and the RMV register setting. (Ex.: When the frequency is 1000 pps and the RMS register is set to 120 pulses, the internal operation time will be 120 msec.) Write a positive number (1 to 134,217,727) into the RMV register. Negative numbers are treated as unsigned positive numbers.
Page 55: Pulsar (Pa/Pb) Input Mode
9-3. Pulsar (PA/PB) input mode This mode is used to allow operations from a pulsar input. In order to enable pulsar input, bring the terminal LOW. Set POFF in the RENV2 register to zero. It is also possible to apply a filter on the input. After writing a start command, when a pulsar signal is input, the LSI will output pulses to the OUT terminal. Use an FL low speed start (STAFL: 50h) or an FH low speed start (STAFH: 51h). Input pulsar signals on the PA and PB terminals. The input specification can be selected from the four possibilities below by setting the PIM0 to 1 bits in the RENV2 (environment setting 2). ♦ Supply a 90˚ phase difference signal (1x, 2x, or 4x). ♦ Supply either positive or negative pulses. Shown below are diagrams of the operation timing. (RENV1: PMD = 100 --- When outputting 2 pulses) 1) When using 90 phase difference signals and 1x input (PIM = 00) 2) When using 90 phase difference signals and 2x input (PIM = 01) 3) When using 90 phase difference signals and 4x input (PIM = 10) 4) When using two pulse input. The pulsar input mode is triggered by an FL constant speed start command (50h) or by an FH constant speed start command (51h). Pulsar input causes the PCL to output pulses with some pulses from the FL speed or FH speed pulse outputs being omitted. Therefore, there may be a difference in the timing between the pulsar input and output pulses, up to the maximum internal pulse frequency. The maximum input frequency for pulsar signals (FP) is restricted by the FL speed when an FL low speed start is used, and by the FH speed when an FH low speed start is used. The LSI outputs signals as errors when both the PA and PB inputs change simultaneously, or when the input frequency is exceeded, or if the input/output buffer counter (4 bits) overflows. This can be monitored by the REST (error interrupt factor) register. - 49 -...
Page 56 FP < (speed) / (input I/F multiply value) Example: When the pulse input setting speed is 1000 pps with a 90˚ phase difference and a 2x input multiplication rate, the input frequency on the PA terminal is less than 500 Hz. Note: When the PA/ PB input frequency fluctuates, take the shortest frequency, not average frequency, as "Frequency of FP" above. <Setting relationship of PA/PB input> Specify the PA/PB input <Set to PIM0 to 1 (bit 20 to 21) in RENV2> [RENV2] (WRITE) 00: 90˚ phase difference, 1x 10: 90˚ phase difference, 4x 01: 90˚ phase difference, 2x 11: 2 sets of up or down input pulses - - n n - - - - Specify the PA/PB input count direction <Set to PDIR (bit 23) in RENV2> [RENV2] (WRITE) 0: Count up when the PA phase is leading. Or, count up on the rising edge of n - - - - - - - ...
Page 57: Continuous Operation Using A Pulsar Input
9-3-1. Continuous operation using a pulsar input (MOD: 01h) This mode allows continuous operation using a pulsar input. When PA/PB signals are input after writing a start command, the LSI will output pulses to the OUT terminal. The feed direction depends on PA/PB signal input method and the value set in PDIR. PA/PB input method PDIR Feed direction PA/PB input Positive direction When the PA phase leads the PB phase. 90˚ phase difference Negative direction When the PB phase leads the PA phase. signal Positive direction When the PB phase leads the PA phase. (1x, 2x, and 4x) Negative direction When the PA phase leads the PB phase. Positive direction PA input rising edge. 2 pulse input of Negative direction PB input rising edge. positive and Positive direction PB input rising edge. negative pulses Negative direction PA input rising edge. The PCL stops operation when the EL signal in the current feed direction is turned ON. But the PCL can be operated in the opposite direction without writing a restart command. When stopped by the EL input, no error interrupt ( output) will occur. To release the operation mode, write an immediate stop command (49h). 9-3-2. Positioning operations using a pulsar input (MOD: 51h) The PCL positioning is synchronized with the pulsar input by using the PRMV setting as incremental position data.
Page 58: External Switch Operation Mode
9-4. External switch operation mode This mode allows operations with inputs from an external switch. The external switch input terminals (+DR, -DR) are common with the pulsar signal input terminal. Apply a positive direction switch signal to the PA/+DR terminal, and a negative direction switch signal to the PB/- DR terminal. To enable inputs from an external switch, bring the terminal LOW. After writing a start command, when a +DR/-DR signal is input, the LSI will output pulses to the OUT terminal. Set the RENVI (environment 1) register to specify the output logic of the DR input signal. The signal can be set to send an output when DR input is changed. If = L, the PCL will output pulses regardless of the operation mode selected. The RSTS (extension status) register can be used to check the operating status and monitor the DR input. It is also possible to apply a filter to the DR or inputs. Set the input logic of the +DR/-DR signals <Set DRL (bit 25) in RENV1 > [RENV1] (WRITE) 31 0: Negative logic - - - - - - n - 1: Positive logic Applying a DR or input filter <Set DRF (bit 27) in RENV1> [RENV1] (WRITE) 31 1: Apply a filter to PA, PB, inputs - - - - n - - - When a filter is applied, pulses shorter than 32 msec will be ignored. Setting an event interrupt cause <Set IRDR (bit 11) in RIRQ> [RIRQ] (WRITE) 8 1: Output the ...
Page 59: Positioning Operation Using An External Switch
[Setting example] 1) Bring the input LOW. 2) Specify RFL, RFH, RUR, RDR, and RMG (speed setting). 3) Enter "0000010" for MOD (bits 0 to 6) in the RMD (operation mode) register 4) Write a start command (50h to 53h). CND (bits 0 to 3) of the RSTS (extension status) register will wait for "0001: DR input." In this condition, turn ON the +DR or -DR input terminal. The axis will move in the specified direction using the specified speed pattern as long as the terminal is kept ON. 9-4-2. Positioning operation using an external switch (MOD: 56h) This mode is used for positioning based on the DR input rising timing. When started, the data in the RMV register is loaded into the positioning counter. When the DR input is ON, the LSI will output pulses and the positioning counter will start counting down pulses. When the positioning counter value reaches zero, the PCL stops operation. Even if the DR input is turned OFF or ON again during the operation, it will have no effect on the operation. If you make the REMV register value 0 and start a positioning operation, the PCL will stop operation immediately without outputting any command pulses. Turn ON the +DR signal to feed in the positive direction. Turn ON the -DR signal to feed in the negative direction. By turning ON the EL signal for the feed direction, movement on the axis will stop. However, the axis can be feed in the reverse direction. An error interrupt ( output) will not occur. - 53 -...
Page 60: Zero Return Operation Mode
9-5. Zero return operation mode Zero return operation varies with the MOD setting of the PRMD register, the ORM settings of the RENV2 register and the type of start command, as follows: Command Operation description Feeds in a positive direction at a constant FL speed and stops immediately when the ORG input changes from OFF to ON. Feeds in a positive direction at a constant FH speed and stops immediately when the ORG input changes from OFF to ON. Starts and accelerates from the FL to the FH speed in a positive direction; starts deceleration when the ORG input changes from OFF to ON. When the PCL has decelerated to the FL speed, it stops feeding pulses. Also, if the PCL completes its deceleration to FL speed by a signal from the SD input before the ORG input changes, the PCL will stop immediately when the ORG input changes from OFF to ON. Feeds in a positive direction at a constant FL speed, after the ORG input changes from OFF to ON. The PCL stops immediately after counting the specified number of EZ input signals. Feeds in a positive direction at a constant FH speed after the ORG input changes from OFF to ON. The PCL stops immediately after counting the specified number of EZ input signals. Starts and accelerates from FL to FH speed in a positive direction. Starts to decelerate when the ORG input changes from OFF to ON. After counting the specified number of EZ input signals, the PCL stops. Also, if the PCL completes its deceleration to FL speed by a signal from the SD input before the ORG input changes, the PCL will stop soon after the ORG input changes from OFF to ON, once it has counted the specified number of EZ input signals. Feeds in a negative direction at a constant FL speed and stops immediately when the ORG input changes from OFF to ON. Feeds in a negative direction at a constant FH speed and stops immediately when the ORG input changes from OFF to ON. Starts and accelerates from the FL to the FH speed in a negative direction; starts deceleration when the ORG input changes from OFF to ON. When the PCL has decelerated to the FL speed, it stops feeding pulses. Also, if the PCL completes its deceleration to FL speed by a signal from the SD input before the ORG input changes, the PCL will stop immediately when the ORG input changes from OFF to ON. Feeds in a negative direction at a constant FL speed, after the ORG input changes from OFF to ON. The PCL stops immediately after counting the specified number of EZ input signals.
Page 61 You can apply an input filter to the ORG input signal by setting the FLTR bit in the RENV2 register. To enable the EZ input signal, set the EINF bit in the RENV1 register. Selection of the zero return operation mode <ORM (bit 29) in RENV2> [RENV1] (WRITE) 0: Use only the ORG signal. 1: Use the ORG signal and EZ signals. - - n - - - - - Reading the ORG signal <SORG (bit 14) in SSTSW> [SSTSW] (READ) 0: Turn OFF the ORG signal. 1: Turn ON the ORG signal. - n - - - - - - Select input logic of the ORG signal <ORGL (bit 7) in RENV1> [RENV1] (WRITE) 0: Negative logic. 1: Positive logic. n - - - - - - - Set the ORG, SD input filter <FLTR (bit 26) in RENV1> [RENV1] (WRITE) 1: Apply a noise filter to the ±EL, SD, ORG, ALM, and INP inputs. When the filter is applied, signals which are shorter than the FTM pulse length - - - - - n - - will be ignored. Specify a time constant for the input filter <FLM (bit 20, 21) in RENV1> [RENV1] (WRITE) 00: 3.2 µs 10: 200 µs 01: 25 µs 11: 1.6 ms - - n n - - - - Reading the EZ signal <SEZ (bit 10) in RSTS> [RSTS] (READ) 0: Turn OFF the EZ signal. 8 1: Turn ON the EZ signal. - - - - - n - - Set the input logic for the EZ signal <EZL (bit 28) in RENV2> [RENV2] (WRITE) 0: Rising edge.
Page 62: Zero Return Operation 0
9-5-1. Zero return operation 0 (ORM = 0) Low speed operation <Sensor: EL (ELM = 0), ORG> Operation 1 Emergency stop Operation 2 Emergency stop Operation 3 High speed operation <Sensor: EL (ELM = 0), ORG> Even if the axis stops normally, it may not be at the zero position. However, COUNTER2 (mechanical position) provides a reliable value. Operation 1 Emergency stop Operation 2 Emergency stop Operation 3 High speed operation <Sensor: EL (ELM = 1), ORG> Even if the axis stops normally, it may not be at the zero position. However, COUNTER2 (mechanical position) provides a reliable value. Operation 1 Emergency stop Operation 2 Emergency stop Operation 3 High speed operation <Sensor: EL (ELM = 1), SD (SDM = 0, SDLT = 0), ORG> Operation 1 Operation 2 Emergency stop Operation 3 Emergency stop Operation 4 Note: Positions marked with "@" reflect the ERC signal output timing when "Automatically output an ERC signal" is selected for the zero stopping position. - 56 -...
Page 63: Zero Return Operation 1
9-5-2. Zero return operation 1 (ORM=1) Low speed operation <Sensor: EL (ELM = 0), ORG, EZ (EZD = 0001)> Operation 1 Emergency stop Operation 2 Emergency stop Operation 3 High speed operation <Sensor: EL, ORG, EZ (EZD = 0001)> Note: Positions marked with "@" reflect ERC signal output timing when "Automatically output an ERC signal" is selected for the zero stopping position. - 57 -...
Page 64: Linear Interpolation Operation
9-6. Linear interpolation operation 9-6-1.Outline of interpolation operation Using one or more PCLs, you can operate linear interpolation feed. Operation mode Continuous linear interpolation Linear interpolation Just like in the linear interpolation mode, in continuous linear interpolation the PCL feeds multiple axes at a specified rate. However, PCL operations can still be started and stopped with commands, the same as in linear interpolation. With the linear interpolation, the PCL automatically stops after the specified feed amount. The linear interpolation circuit in this PCL interpolates between a dummy axis associated with each axis and the actual axis. By entering maximum feed amount data for each and every dummy axis, the PCLs will execute an indirect linear interpolation between the axes. As each interpolated axis operates independently, the start timing, deceleration timing, and error stop timing must be matched between the axes. When you want to use multiple PCLs and have them interpolate for each other, connect CSD, CSTA, and CSTP terminals on each PCL to each other and provide a pull up resistor (5 k to 10 k-ohms) on VDD (3.3v) for each signal line. Even when performing interpolation within a single PCL, a pull up resistor is required. 9-6-2. Interpolation procedures 1) Enter a feed amount with a sign in the PRMV register for each axis. The sign specifies the feed direction. 2) Enter the absolute value of the PRMV (from the axis with the largest feed amount) in the PRIP registers of all the axes that will perform an interpolation. 3) Specify the speed pattern (PRFL, PRFH, PRUR, PRMG, PRDP, PRDR, PRUS, PRDS) that will be used for the axis with the maximum feed amount for all the axes that will perform an interpolation. When you want to specify a synthesized speed, obtain the speed factor for the axis with the maximum feed amount by calculation from the CPU. Then, enter this speed for all the axes that will perform an interpolation. 4) If any of the axes performing an interpolation stops due to an error, and if you want to stop all the other axes performing an interpolation, set the MSPE and MSP0 bits in the PRMD register on those axes to 1. 5) When you want to interpolate using acceleration/deceleration, set the MCDE and MSD0 bits in the PRMD register to 1 for all the axes that will perform an interpolation. 6) When you want to perform an interpolation using only one PCL, specify the axis to interpolate in the upper byte (COMB1) when writing the start command. When you want to perform an interpolation using multiple PCLs, set the MSY0 and 1 bits in the PRMD register to 01, on all the axes that will perform an interpolation. Then write a postponed start command (waiting for a CSTA input). - 58 -...
Page 65: Operation During Interpolation
After setting all the axes that will perform an interpolation for a postponed start, write the CSTA output command 06h (simultaneous start) to any of these axes and all of the axes that will perform the interpolation will start at the same time. Other axes that are not interpolating can be operated independently. [Setting example] Use the settings below and write a start command (0751h). The PCL will output pulses with the timing shown in the figure below. Entering values in the blank items will not affect operation. Setting X axis Y axis Z axis PRMV value Operation speed 1000 pps 1000 pps 1000 pps [Precision of linear interpolation] As shown in the figure on the right, linear interpolation executes an interpolation from Y (Slave axis) the current coordinates to the end coordinates. End coordinates (10, 4) The positional precision of a specified line during ± linear interpolation will be 0.5 LSB throughout the interpolation range. "LSB" refers to the minimum feed unit for the ±0.5 LSB max PRMV register setting. It corresponds to the resolution of the mechanical system. (distance X (Master axis) between tick marks in the figure on the right.) 9-6-3. Operation during interpolation Acceleration/deceleration operations...
Page 66 Continuous interpolation The PCL can use the pre-register to make a continuous linear interpolation. Continuous interpolation refers to linear interpolation operations performed successively. An example of the settings for continuous interpolation using the pre-register is shown in section 11-11- 1, "Start triggered by a stop on another axis." - 60 -...
Page 67: Speed Patterns
10. Speed patterns 10-1. Speed patterns Speed pattern Continuous mode Positioning operation mode FL low speed operation 1) Write an FL speed start command 1) Write an FL speed start command (50h). (50h). 2) Stop feeding when the positioning counter 2) Stop feeding by writing an immediate reaches zero, or by writing an immediate stop (49h) or deceleration stop stop (49h) or deceleration stop (4Ah) (4Ah) command. command. 2) FH low speed operation 1) Write an FH speed start command 1) Write an FH speed start command (51h). (51h). 2) Stop feeding when the positioning counter 2) Stop feeding by writing an immediate reaches zero, or by writing an immediate stop command (49h). stop (49h) command. * When the deceleration stop command (4Ah) is written to the register, the PCL starts deceleration. High speed operation 1) 1) Write high speed start command 1 1) Write high speed start command 1 (52h). (52h). 2) Start deceleration by writing a 2) Start deceleration when a ramping-down deceleration stop command (4Ah). point is reached or by writing a deceleration stop command (4Ah). * When the deceleration stop command (49h) is written to the * When positioning with a high speed start register, the PCL immediately stops command 1 (52h), the ramping-down operation.
Page 68: Speed Pattern Settings
10-2. Speed pattern settings Specify the speed pattern using the registers (pre-registers) shown in the table below. If the next register setting is the same as the current value, there is no need to write to the register again. Bit length Pre-register Description Setting range Register setting range -134,217,728 to 134,217,727 PRMV Positioning amount (8000000h) (7FFFFFFh) PRFL Initial speed 1 to 16,383 (03FFFh) PRFH Operation speed 1 to 16,383 (03FFFh) PRUR Acceleration rate 1 to 16,383 (03FFFh) PRDR Deceleration rate Note 1 0 to 16,383 (03FFFh) PRMG Speed magnification rate 1 to 4,095 (0FFFh) PRDP Ramping-down point 0 to 16,777,215 (0FFFFFFh) PRUS S-curve acceleration range 0 to 8,191 (1FFFh) PRDS S-curve deceleration range 0 to 8,191 (1FFFh) Note 1: If PRDR is set to zero, the deceleration rate will be the value set in the PRUR. [Relative position of each register setting for acceleration and deceleration factors] ♦ PRFL: FL speed setting register (14-bit) Specify the speed for FL low speed operations and the start speed for high speed operations (acceleration/deceleration operations) in the range of 1 to 16,383 (3FFFh).
Page 69 ♦ PRUR: Acceleration rate setting register (14-bit) Specify the acceleration characteristic for high speed operations (acceleration/deceleration operations), in the range of 1 to 16,383 (3FFFh) Relationship between the value entered and the acceleration time will be as follows: 1) Linear acceleration (MSMD = 0 in the PRMD register) (PRFH - PRFL) x (PRUR + 1) x 2 Acceleration time [s] = Reference clock frequency [Hz] 2) S-curve without a linear range (MSMD=1 in the PRMD register and PRUS register =0) (PRFH - PRFL) x (PRUR + 1) x 4 Acceleration time [s] = Reference clock frequency [Hz] 3) S-curve with a linear range (MSMD=1 in the PRMD register and PRUS register >0) (PRFH - PRFL + 2 x PRUS) x (PRUR + 1) x 2 Acceleration time [s] = Reference clock frequency [Hz] ♦ PRDR: Deceleration rate setting register (14-bit) Normally, specify the deceleration characteristics for high speed operations (acceleration/deceleration operations) in the range of 1 to 16,383 (3FFFh). To select the ramp down point auto setting (MSDP = 0 in the PRMD register), set the PRDR register the same as PRUR register setting, or enter 0. When PRDR = 0, the deceleration rate will be the value placed in the PRUR. The relationship between the value entered and the deceleration time is as follows. 1) Linear deceleration (MSMD = 0 in the PRMD register) (PRFH - PRFL) x (PRDR + 1) x 2 Deceleration time [s] = Reference clock frequency [Hz] 2) S-curve deceleration without a linear range (MSMD=1 in the PRMD register and PRDS register = 0) (PRFH - PRFL) x (PRDR + 1) x 4 Deceleration time [s] = Reference clock frequency [Hz] 3) S-curve deceleration with a linear range (MSMD=1 in the PRMD register and PRDS register >0) (PRFH - PRFL + 2 x PRDS) x (PRDR + 1) x 2 Deceleration time [s] = Reference clock frequency [Hz] ♦ PRMG: Magnification rate register (12-bit) Specify the relationship between the PRFL and PRFH settings and the speed, in the range of 1 to 4,095 (0FFFh). As the magnification rate is increased, the speed setting units will tend to be approximations. Normally set the magnification rate as low as possible.
Page 70 [Magnification rate setting example, when the reference clock =19.6608 MHz] (Output speed unit: pps) Magnification Output speed Magnification Output speed Setting Setting rate range rate range 3999 (0F9Fh) 0.3 to 4,914.9 59 (003Bh) 20 to 327,660 2399 (095Fh) 0.5 to 8,191.5 23 (0017h) 50 to 819,150 1199 (04AFh) 1 to 16.383 11 (000Bh) 100 to 1,638,300 599 (0257h) 2 to 32,766 5 (0005h) 200 to 3,276,600 239 (00EFh) 5 to 81,915 2 (0002h) 400 to 6,553,200 119 (0077h) 10 to 163,830 1 (0001h) 600 to 9,829,800 The maximum output speed of this IC can be attained when the reference clock is 30 MHz, PRMG = 1, and PRFH = 16383. In these conditions, the multiplication rate is 915.527x and the IC will output 14.999 Mpps. ♦ PRDP: Ramping-down point register (24-bits) Specify the value used to determine the deceleration start point for positioning operations that include acceleration and deceleration.
Page 71 <When set to automatic (MSDP = 0 in the PRMD register)> This is an offset value for the automatically set ramping-down point. Set in the range of -8,388,608 (800000h) to 8,388,607 (7FFFFFh). When the offset value is a positive number, the axis will start deceleration at an earlier stage and will feed at the FL speed after decelerating. When a negative number is entered, the deceleration start timing will be delayed. If the offset is not required, set to zero. ♦ PRUS: S-curve acceleration range register (13-bit) Specify the S-curve acceleration range for S-curve acceleration/deceleration operations in the range of 1 to 8,191 (1FFFh). The S-curve acceleration range S will be calculated from the value placed in PRMG. Reference clock frequency [Hz] [pps] = PRUS x SU (PRMG + 1) x 16384 In other words, speeds between the FL speed and (FL speed + S ), and between (FH speed - S and the FH speed, will be S-curve acceleration operations. Intermediate speeds will use linear acceleration. However, if zero is specified, "(PRFH - PRFL)/2" will be used for internal calculations, and the operation will be an S-curve acceleration without a linear component. ♦ PRDS: S-curve deceleration range setting register (13-bit) Same as the PRUS, specify an S-curve deceleration range for the S-curve acceleration/deceleration operation between 1 and 8,191 (1FFFh). The S-curve acceleration range S will be calculated from the value placed in PRMG. Reference clock frequency [Hz] [pps] = PRDS x SD (PRMG + 1) x 16384 In other words, speeds between the FL speed and (FL speed + S ), and between (FH speed - S and the FH speed, will be S-curve deceleration operations. Intermediate speeds will use linear deceleration. However, if zero is specified, "(PRFH - PRFL)/2" will be used for internal calculations, and the operation will be an S-curve deceleration without a linear component. - 65 -...
Page 72: Manual Fh Correction
10-3. Manual FH correction When the FH correction function is turned ON (MADJ = 0 in the PRMD register), and when the feed amount is too small for a normal acceleration and deceleration operation, the LSI will automatically lower the FH speed to eliminate triangle driving. In addition, the ramp down point auto setting will also change according to the FH correction result. However, the ramp down point auto setting function can only be used when the acceleration curve and deceleration curve are symmetrical. In other words, if you want to make the acceleration and deceleration curves asymmetrical, the slow down point needs to be changed to a manual setting. In order to obtain the correct manual setting value, you have to know the maximum speed. Therefore, you have to turn OFF the FH correction function and manually correct the FH value. [FH correction function] Automatic correction of the maximum speed for changing the feed amount. - 66 -...
Page 73 < To execute FH correction manually> 1) Linear acceleration/deceleration speed (MSMD=0 in the PRMD register) 2 (PRFH - PRFL ) x (PRUR + PRDR + 2) PRMV (PRMG + 1) x 16384 (PRMG + 1) x 16384 x PRMV PRFH + PRFL PRUR + PRDR + 2 2) S-curve acceleration without linear acceleration (MSMD=1 in the PRMD and PRDS registers = 0) 2 (PRFH - PRFL ) x (PRUR + PRDR + 2) x 2 When PRMV (PRMG + 1) x 16384 (PRMG + 1) x 16384 x PRMV PRFH + PRFL (PRUR + PRDR + 2) x 2 3) S-curve acceleration/deceleration with linear acceleration/deceleration (MSMD = 1 in the PRMD register and the PRUS register > 0, PRDS register > 0) (3)-1. When PRUS = PRDS (i) Set up a small linear acceleration range (PRFH + PRFL) x (PRFH - PRFL + 2 x PRUS) x (PRUR + PRDR + 2) PRMV (PRMG + 1) x 16384 (PRUS + PRFL) x PRUS x (PRUR + PRDR + 2) x 4 PRMV > (PRMG + 1) x 16384 (PRMG + 1) x 16384 x PRMV 2 PRFH - PRSU + (PRUS - PRFL) (PRUR + PRDR + 2) (ii) Eliminate the linear acceleration/deceleration range (PRUS + PRFL) x PRUS x (PRUR + PRDR + 2) x 4 PRMV ...
Page 74 (3)-2. When PRUS < PRDS (i) Set up a small linear acceleration/deceleration range When (PRFH+PRFL) x {(PRFH-PRFL) x (PRUR + PRDR + 2) + 2 x PRUS x (PRUR+1) + 2 x PRDS x (PRDR + 1)} PRMV (PRMG + 1) x 16384 (PRDS+PRFL) x {PRDS x (PRUR + 2 x PRDR + 3) + PRUS x (PRUR + 1)} x 4 PRMV > (PRMG + 1) x 16384 -A + A + B PRFH PRUR + PRDR + 2 However, A = PRUS x (PRUR + 1) + PRDS x (PRDR + 1) B= {(PRMG + 1) x 16384 x PRMV - 2 x A x PRFL + (PRUR + PRDR + 2) x PRFL } x (PRUR + PRDR + 2) (ii) Eliminate the linear acceleration/deceleration range and set up a small linear acceleration section. When (PRDS + PRFL) x {PRDS x (PRUR + 2 x PRDR + 3)} + PRUS x (PRUR +1 )} x 4 PRMV (PRMG + 1) x 16384 (PRUS + PRFL) x PRUS x (PRUR + PRDR + 2) x 8 PRMV > (PRMG + 1) x 16384 Change to S-curve acceleration/deceleration without any linear acceleration/deceleration (PRUS>0, PRDS=0) -A + A + B PRFH PRUR + 2 x PRDR + 3 However, A = PRUS x (PRUR + 1), B= {(PRMG + 1) x 16384 x PRMV - 2 x A x PRFL + (PRUR + 2 x PRDR + 3) x PRFL } x (PRUR + 2 x PRDR + 3) (iii) Eliminate the linear acceleration/deceleration range (PRUS + PRFL) x PRUS x (PRUR + PRDR + 2) x 8 When PRMV (PRMG + 1) x 16384 Change to S-curve acceleration/deceleration without any linear acceleration/deceleration (PRUS=0, PRDS=0), (PRMG + 1) x 16384 x PRMV PRFH + PRFL (PRUR + PRDR + 2) x 2 Reference...
Page 75 (3)-3. When PRUS>PRDS (i) Set up a small linear acceleration/deceleration range When (PRFH + RFL) x {(PRFH - PRFL) x (PRUR + PRDR + 2) + 2 x PRUS x (PRUR + 1) + 2 x PRDS x (PRDR + 1)} PRMV (PRMG +1) x 16384 (PRUS + PRFL) x {PRUS x (2 x PRUR + PRDR + 3) + PRDS x (PRDR + 1) x 4 PRMV > , (PRMG + 1) x 16384 -A + A + B PRFH PRUR + PRDR + 2 However, A = PRUS x (PRUR + 1) + PRDS x (PRDR + 1), B= {(PRMG + 1) x 16384 x PRMV - 2 x A x PRFL + (PRUR + PRDR + 2) x PRFL } x (PRUR + PRDR + 2) (ii) Eliminate the linear acceleration section and set up a small linear deceleration range. When (PRUS + PRFL) x {PRUS x (2 x PRUR + PRDR + 3) + PRDS x (PRDR + 1)} x 4 PRMV (PRMG + 1) x 16384 (PRDS + PRFL) x PRDS x (PRUR + PRDR + 2) x 8 PRMV > , (PRMG + 1) x 16384 Change to S-curve acceleration/deceleration without any linear acceleration (PRUS = 0, PRDS > 0) -A + A + B PRFH 2 x PRUR+ PRDR + 3 However, A = PRDS x (PRDR + 1), B= {(PRMG + 1) x 16384 x PRMV - 2 x A x PRFL + (2 x PRUR + PRDR + 3) x PRFL } x (2 x PRUR + PRDR + 3) (iii) Eliminate the linear acceleration/deceleration range (PRDS + PRFL) x PRDS x (PRUR + PRDR + 2) x 8 When PRMV (PRMG + 1) x 16384 Change to S-curve acceleration/deceleration without any linear acceleration/deceleration (PRUS = 0, PRDS = 0), (PRMG + 1) x 16384 x PRMV + PRFL PRFH ...
Page 76: Example Of Setting Up An Acceleration/Deceleration Speed Pattern
10-4. Example of setting up an acceleration/deceleration speed pattern Ex. Reference clock = 19.6608 MHz When the start speed =10 pps, the operation speed =100 kpps, the accel/decl time = 300 msec, and linear acceleration/deceleration is selected. 1) Select the 10x mode for multiplier rate in order to get 100 kpps output PRMG = 119 (0077h) 2) Since the 10x mode is selected to get an operation speed 100 kpps, PRFH = 10000 (2710h) 3) In order to set a start speed of 10 pps, the rate magnification is set to the 10x mode. PRFL = 10 (000Ah) 4) In order to make the acceleration/deceleration time 300 msec, calculate from the equation for the acceleration time and the RUR value. (PRFH - PRFL) x (PRUR + 1) x 2 Acceleration time [s] = Reference clock frequency [Hz] (10000 - 1) x (PRUR + 1) x 2 0.3 = 19.6608 x 10 PRUR = 293.94 However, since only integers can be entered for PRUR, use 293 or 294. The actual acceleration/deceleration time will be 299.04 msec if PRUR = 293, or 300.06 msec if PRUR = 29. 5) Since the acceleration and deceleration times are equal, place a 0 in the PRDR register and the deceleration rate will be the same as the value in PRUR. An example of the speed pattern when PRUR = 294 - 70 -...
Page 77: Changing Speed Patterns While In Operation
10-5. Changing speed patterns while in operation By changing the RFH, RUR, RDR, RUS, or RDS registers during operation, the speed and acceleration can be changed on the fly. However, if the ramping-down point was set to automatic (MSDP = 0 in the RDM register) for the positioning mode, do not change the values for RFL, RUR, RDR, RUS, or RDS. The automatic ramping-down point function will not work correctly. When using S-curve acceleration/deceleration, and the ramp down point auto setting is selected, if you want to change the speed during operation, you must set PRUS = PRDS = 0. If the PCL reached the ramp down point while still accelerating and started to ramp down, it would stop feeding without decelerating to the FL speed. Therefore, in this case, you must be careful about changing the speed timing. When using linear acceleration/deceleration, you do need not to be concerned about this timing. An example of changing the speed pattern by changing the speed, during a linear acceleration/deceleration operation Speed Time Use a small RFH while accelerating or decelerating the axis until it reaches the correct speed. 2), 3) Change RFH after the acceleration/deceleration is complete. The axis will continue accelerating or decelerating until it reaches the new speed. An example of changing the speed pattern by changing the speed during S-curve acceleration/deceleration operation Speed Time Use a small RFH and if ((change speed) < (speed before change)) and the axis will accelerate/decelerate using an S-curve until it reaches the correct speed. Use a small RFH and if ((change speed) (speed before change)) and the axis will accelerate/decelerate without changing the S-curve's characteristic until it reaches the correct speed. Use a large RFH while accelerating and the axis will accelerate to the original speed entered without changing the S-curve's characteristic. Then it will accelerate again until it reaches the newly set speed. 2), 3) If RFH is changed after the acceleration/deceleration is complete, the axis will accelerate/decelerate using an S-curve until it reaches the correct speed. - 71 -...
Page 78: Description Of The Functions
11. Description of the Functions 11-1. Reset After turning ON the power, make sure to reset the LSI before beginning to use it. To reset the LSI, hold the terminal LOW while supplying at least 8 cycles of a reference clock signal. After a reset, the various portions of the LSI will be configured as follows. Item Reset status (initial status) n = x, y, z, u Internal registers, pre-register Control command buffer Axis assignment buffer Input/output buffer terminal HIGH terminal HIGH terminal HIGH D0 to D7 terminals High Z (impedance) D8 to D15 terminals High Z (impedance) P0n to P7n terminals Input terminal terminal HIGH terminal HIGH terminal HIGH OUTn terminal HIGH DIRn terminal HIGH ERCn terminal HIGH terminal HIGH - 72 -...
Page 79: Position Override
11-2. Position override This LSI can override (change) the target position freely during operation. However, the PCL cannot execute a position override during linear interpolation. There are two methods for overriding the target position. 11-2-1. Target position override 1 By rewriting the target position data (RMV register value), the target position can be changed. The starting position is used as a reference to change target position.
Page 80: Target Position Override 2 (Pcs Signal)
Note 2: The position override is only valid while feeding. When the PCL receives an override command just a little before stopping a feed, it may not respond to the override command. For this reason, check SEOR in the main status after stopped. If the override is ignored, the SEOR will become "1." The PCL will set SEOR to "1" when it receives a command in the RMV register (90h) while feeding is stopped to allow the override command to be evaluated. Therefore, if the command is written to the RMV register while stopped, before feeding starts, the SEOR will also become "1." When the override command is ignored, the PCL will set SEOR to "1" after stopped. After reading the MSTS, the PCL will set SEOR to "0" within three CLK cycles. 11-2-2. Target position override 2 (PCS signal) By making MPCS in the PRMD (operation mode) register "1," the PCL will perform positioning operations for the amount specified in the PRMV register, based on the timing of this command after the operation start (after it starts outputting instruction pulses) or on the "ON" timing of the PCS input signal. A PCS input signal can change the input logic. The PCS terminal status can be monitored using the RSTS register (extension status). Setting pulse control using the PCS input <Set MPCS (bit 14) in PRMD> [PRMD] (WRITE) 1: Positioning for the number of pulses stored in the PRMV, starting from the 15 8 - n - - - - - - time at which the PCS input signal is turned ON. Setting the PCS input logic <Set PCSL (bit 24) in RENV1> [RENV1] (WRITE) 0: Negative logic 31 - - - - - - - n 1: Positive logic Reading the PCS signal < SPCS (bit 8) in RSTS> [RSTS] (READ) 0: Turn OFF PCS 15 8 - - - - - - - n 1: Turn ON PCS PCS substitution input <STAON: Operation command> [Operation command] Perform processes that are identical to those performed by supplying a PCS signal.
Page 81: Output Pulse Control
11-3. Output pulse control 11-3-1. Output pulse mode There are four types of common command pulse output modes and two types of 2-pulse modes, and two types of 90 phase difference mode. Common pulse mode: Outputs operation pulses from the OUT terminal and outputs the direction signal from the DIR terminal. (MOD = 000 to 011) 2-pulse mode: Outputs positive direction operation pulses from the OUT terminal, and outputs negative direction operation pulses from the DIR terminal. (MOD = 100, 111) phase difference mode: This mode outputs signals from the OUT terminal and DIR terminal with a phase difference. (MOD = 101, 110) The output mode for command pulses is set in PMD (bits 0 to 2) in RENV1 (environment setting 1). If motor drivers using the common pulse mode need a lag time (since the direction signal changes, until receiving a command pulse), use a direction change timer. When DTMP (bit 28) in the RENV1 (environment setting 1) is set to 0, the operation can be delayed for one direction change timer unit (0.2 msec), after changing the direction identification signal. When DTMF is 1, the PCL will output pulses 10 CLK cycles (0.5 µs) after DIR changes. Setting the pulse output mode <Set PMD0 to 2 (bits 0 to 2) in RENV1> [RENV1] (WRITE) 7 0 When feeding in the When feeding in the PMD0 - - - - - n n n positive direction negative direction to 2 OUT output DIR output OUT output DIR output High High High High High High...
Page 82: Control The Output Pulse Length And Operation Complete Timing
11-3-2. Control the output pulse length and operation complete timing Output pulse length is a 50% duty cycle. When the PRMG setting is an even number, the duty cycle may deviate slightly and the ON time may be shorter than the OFF time. (Pulse ON time) / (Pulse cycle) = (PRMG set value / 2) / (PRMG set value +1) Also, when setting METM (operation completion timing setting) in the PRMD register (operation mode), the operation complete timing can be changed. 1) When METM = 0 (the point at which the output frequency cycle is complete) in the PRMD register 2) When METM = 1 (when the output pulse is OFF) in the PRMD register When set to "complete when the output pulse is OFF," the time interval "Min" from the last pulse until the next starting pulse output will be T = 17 x T . (T : Reference clock frequency) Setting the operation complete timing <Set METM (bit 12) in PRMD> [RMD] (WRITE) 0: At the end of a cycle of a particular output frequency 1: Complete when the output pulse turns OFF. - - - - - - - - 76 -...
Page 83: Mechanical External Input Control
11-4. Mechanical external input control 11-4-1. +EL, -EL signal When an end limit signal (a +EL signal when feeding in the + direction) in the feed direction turns ON while operating, the axis will stop immediately or decelerate and stop. After stopping, even if the EL signal is turned OFF, the axis will remain stopped. For safety, keep the EL signal ON until the axis reaches the end of the stroke. If the EL signal is ON when writing a start command, the axis cannot start moving in the direction of the particular EL signal that is ON. By setting ELM in the RENV1 (environment setting 1) register, the stopping pattern for use when the EL signal is turned ON can be set to immediate stop or deceleration stop (high speed start only). The minimum pulse width of the EL signal is 2 cycles of reference clock cycles (0.4 µs) when the input filter is OFF. When the input filter is OFF the minimum pulse time for the EL signal is two reference clock cycles (0.1 µs). When the input filter is ON, the PCL will not respond to pulse signals shorter than the specified time. By reading the SSTSW (sub status), you can monitor the EL signal. By reading the REST register, you can check for an error interrupt caused by the EL signal turning ON. When in the timer mode, this signal is ignored. Even in this case, the EL signal can be monitored by reading SSTSW (sub status). The input logic of the EL signal can be set for each axis using the ELL input terminal. Set the input logic of the EL signal <ELL input terminal> L: Positive logic input H: Negative logic input Stop method to when the EL signal turns ON <Set ELM (bit 3) in RENV1> [RENV1] (WRITE) 7 0 0: Immediate stop by turning ON the EL signal - - - - n - - - 1: Deceleration stop by turning ON the EL signal Setting the ±EL input filter <Set FLTR (bit 26) in RENV1> [RENV1] (WRITE) 1: Inset filters to EL, SD, ORG, ALM, and INP inputs. When the filter is inserted, pulses shorter than the FTM set value are ignored. - - - - - n - - Select the input filter characteristics <Set FTM (bits 20, 21) in RENV1> [RENV1] (WRITE) 00: 3.2 µs 10: 200 µs - - n n - - - - ...
Page 84 [FL low speed operation] [FH low speed operation] [High speed operation] 2) Latch and decelerate <SDM (bit 4) = 0, SDLT (bit 5) = 1 in RENV1 register> - While feeding at low speed, the SD signal is ignored. While in high speed operation, decelerate to FL speed by turning the SD signal ON. Even if the SD signal is turned OFF after decelerating or while decelerating, the axis will continue moving at FL speed and will not accelerate to FH speed. - If the SD signal is turned ON while writing a high speed command, the axis will feed at FL speed. Even if the SD signal is turned OFF, the axis will not accelerate to FH speed. [FL low speed operation] [FH low speed operation] [High speed operation] 3) Deceleration stop <SDM (bit 4) = 1, SDLT (bit 5) = 0 in RENV1 register> - If the SD signal is turned ON while in low speed operation, the axis will stop. While in high speed operation, the axis will decelerate to FL speed when the SD signal is turned ON, and then stop. If the SD signal is turned OFF during deceleration, the axis will accelerate to FH speed. - If the SD signal is turned ON after writing a start command, the axis will complete its operation without another start. - When stopped, the axis will output an signal. [FL low speed operation] [FH low speed operation] [High speed operation] 4) Latched, deceleration stop <SDM (bit 4) = 1, SDLT (bit 5)=1 in RENV1> - If the SD signal is turned ON while in low speed operation, the axis will stop. If the SD signal is turned ON while in high speed operation, the axis will decelerate to FL speed and then stop. Even if the SD signal is turned OFF during deceleration, the axis will not accelerate. - If the SD signal is turned ON while writing a start command, the axis will not start moving and the operation will not be completed. - While stopped, the LSI outputs an signal. - 78 -...
Page 85 [FL low speed operation] [FH low speed operation] [High speed operation] The input logic of the SD signal can be changed. If the latched input is set to accept input from the SD signal, and if the SD signal is OFF at the next start, the latch will be reset. The latch is also reset when the latch input is set to zero. When the input filter is OFF the minimum pulse time for the SD signal is two reference clock cycles (0.1 µs). When the input filter is ON, the PCL will not respond to pulse signals shorter than the specified time. The latch signal of the SD signal can be monitored by reading SSTSW (sub status). The SD signal terminal status can be monitored by reading RSTS (extension status). By reading the REST register, you can check for an error interrupt caused by the SD signal turning ON. Enable/disable SD signal input <Set MSDE (bit 8) in PRMD> [RMD] (WRITE) 15 8 0: Enable SD signal input - - - - - - - n 1: Disable SD signal input Input logic of the SD signal <Set SDL(bit 6) in RENV1> [RENV1] (WRITE) 0: Negative logic 7 0 - n - - - - - - 1: Positive logic Set the operation pattern when the SD signal is turned ON <Set SDM (bit 4) in [RENV1] (WRITE) RENV1> 7 0 - - - n - - - - 0: Decelerates on receiving the SD signal and feeds at FL low speed 1: Decelerates and stops on receiving the SD signal Select the SD signal input type <Set SDLT (bit 5) in RENV1> [RENV1] (WRITE) 0: The SD signal is level input 7 0 - - n - - - - - 1: The SD signal is latch input ...
Page 86: Org, Ez Signals
11-4-3. ORG, EZ signals These signals are enabled in the zero return modes. When the input filter is OFF the minimum pulse time for the ORG signal is 2 reference clock cycles (0.1 µs). When the input filter is ON, the PCL will not respond to pulse signals shorter than the specified time. In addition, the ORG signal is sampled during the period that the output pulse is ON, so the ORG input must be latched ON for more than one pulse. The input logic of the ORG signal and EZ signal can be changed using the RENV1 register and RENV 2 register. The ORG terminal status can be monitored by reading SSTSW (sub status). The EZ terminal status can be monitored by reading the RSTS register (extension status). For details about the zero return operation modes, see 9-5, "Zero position operation mode." ORG signal and EZ signal timing (When the input filter is OFF) T : Reference clock cycle CLK: (i) When t 2 x T , counts. (ii) When T < t < 2 x T counting is undetermined. (iii) When t T , do not count. Enabling the ORG and EZ signals <Set MOD (bits 0 to 6) in PRMD> [PRMD] (WRITE) 001 0000: Zero return in the positive direction 7 0 0 n n n n n n n 010 1000: Zero return in the negative direction Setting the zero return method <Set ORM (bit 29) in RENV2> [RENV2] (WRITE) 0: Use only the ORG input. - - n - - - - - 1: Use both the ORG input and EZ input. Set the input logic for the ORG signal <Set ORGL (bit 7) in RENV1> [RENV1] (WRITE) 0: Negative logic 7 ...
Page 87: Servomotor I/F
11-5. Servomotor I/F 11-5-1. INP signal The pulse strings input accepting servo driver systems have a deflection counter to count the difference between command pulse inputs and feedback pulse inputs. The driver controls to adjust the difference to zero. In other words, the effective function of servomotors is to delete command pulses and, even after the command pulses stop, the servomotor systems keep feeding until the count in the deflection counter reaches zero. This LSI can receive a positioning complete signal (INP signal) from a servo driver in place of the pulse output complete timing, to determine when an operation is complete. When the INP signal input is used to indicate the completion status of an operation, the signal when an operation is complete, the main status (bits 0 to 5 of the MSTSW, stop condition), and the extension status (CND0 to 3, operation status) will also change when the INP signal is input. The input logic of the INP signal can be changed. The minimum pulse width of the INP signal is 2 cycles of the reference clock (0.1 µsec) when the input filter is OFF. If the input filter is ON, the PCL does not receive pulses shorter than the set length. If the INP signal is already ON when the PCL is finished outputting pulses, it treats the operation as complete, without any delay. The INP signal can be monitored by reading the RSTS register (extension status). Set the operation complete delay using the INP signal <Set MINP (bit 9) in [PRMD] PRMD> (WRITE) 0: No operation complete delay waiting for the INP signal. 15 8 - - - - - - n - 1: Operation complete (status, ) delay until the INP signal turns ON. Input logic of the INP signal <Set INPL (bit 22) in RENV1> [RENV1] (WRITE) 0: Negative logic 23 - n - - - - - - 1: Positive logic Reading the INP signal <SINP (bit 16) in RSTS> [RSTS] (READ) 0: The INP signal is OFF 23 1: The INP signal is ON 0 0 0 0 0 0 0 n ...
Page 88: Erc Signal
11-5-2. ERC signal A servomotor delays the stop until the deflection counter in the driver reaches zero, even after command pulses have stopped being delivered. In order to stop the servomotor immediately, the deflection counter in the servo driver must be cleared. This LSI can output a signal to clear the deflection counter in the servo driver. This signal is referred to as an "ERC signal." The ERC signal is output as one shot signal or a logic level signal. The output type can be selected by setting EPW in the RENV1 register (environment setting 1). If an interval is required for the servo driver to recover after turning OFF the ERC signal (HIGH) before it can receive new command pulses, the ETW signal OFF timer can be selected by setting ETW in the RENV1 register. In order to output an ERC signal at the completion of a zero return operation, set EROR (bit 11) = 1 in the RENV1 register (environment setting 1) to make the ERC signal an automatic output. For details about ERC signal output timing, see the timing waveform in section 9-5-1, "Zero return operation." In order to output an ERC signal for an immediate stop based on the EL signal, ALM signal, or signal input, or on the emergency stop command (05h), set EROE (bit 10) = 1 in the RENV1 register, and set automatic output for the ERC signal. (In the case of a deceleration stop, the ERC signal cannot be output, even when set for automatic output.) The ERC signal can be output by writing an ERC output command (24h). The output logic of the ERC signal can be changed by setting the RENV1 register. Read the RSTS (extension status) register to monitor the ERC signal. Set automatic output for the ERC signal <Set EROE (bit 10) in RENV1> [RENV1] (WRITE) 1: Does not output an ERC signal when stopped by EL, ALM, or 15 8 - - - - - n - - input. 1: Automatically outputs an ERC signal when stopped by EL, ALM, or input. Set automatic output for the ERC signal <Set EROR (bit 11) in RENV1> [RENV1] (WRITE) 0: Does not output an ERC signal at the completion of a zero return 15 8 - - - - n - - - operation. 1: Automatically outputs an ERC signal at the completion of a zero return operation. Set the ERC signal output width <Set EPW0 to 2 (bits 12 to 14) in RENV1> [RENV1] (WRITE) 15 8 000: 12 µsec 100: 13 msec - n n n - - - -...
Page 89: Alm Signals
Specify the ERC signal OFF timer time <Set ETW0 to 1 (bits 16 to 17) in [RENV1] (WRITE) RENV1> 23 - - - - - - n n 00: 0 µsec 10: 1.6 msec 01: 12 µsec 11: 104 msec Read the ERC signal <SERC (bit 9) in RSTS> [RSTS] (READ) 0: The ERC signal is OFF 15 8 0 - - - - - n - 1: The ERC signal is ON Emergency stop command <CMEMG: Bit control command> [Bit control command] Output an ERC signal ERC signal output command <ERCOUT: Bit control command > [Bit control command] Turn ON the ERC signal ERC signal output reset command <ERCRST: Bit control command > [Bit control command] Turn OFF the ERC signal 11-5-3. ALM signals Input alarm (ALM) signal. When the ALM signal turns ON while in operation, the axis will stop immediately or decelerate and stop. To stop using deceleration, keep the ALM input ON until the axis stops operation. However, the axis only decelerates and stops on an ALM signal if it was started with a high speed start. If the ALM signal is ON when a start command is written, the LSI will not output any pulses. The minimum pulse width of the ALM signal is 2 cycles of the reference clock (0.1 µs) if the input filter is OFF. If the input filter is ON, the PCL does not receive pulses shorter than the specified length. The input logic of the ALM signal can be changed. The signal status of the ALM signal can be monitored by reading SSTSW (sub status). Stop method when the ALM signal is ON <Set ALMM (bit 8) in RENV1> [RENV1] (WRITE) 0: Stop immediately when the ALM signal is turned ON 15 8 - - - - - - - n 1: Deceleration stop (high speed start only) when the ALM signal is turned ON Input logic setting of the ALM signal <Set ALML (bit 9) in RENV1>...
Page 90: External Start, Simultaneous Start
11-6. External start, simultaneous start 11-6-1. signal This LSI can start when triggered by an external signal on the terminals. Set MSY (bits 18 and 19) = 01 in the PRDM register (operation mode) and the LSI will start feeding when the goes LOW. When you want to control multiple axes using more than one LSI, connect the terminal on each LSI and set the axes to "waiting for input", to start them all at the same time. In this example a start signal can be output through the terminal. The input logic on the terminals cannot be changed. By setting the RIRQ register (event interrupt cause), the signal can be output together with a simultaneous start (when the input is ON). By reading the RIST register, the cause of an event interrupt can be checked. The operation status (waiting for input), and status of the terminal (OR of the signals) can be monitored by reading the RIST register, or RSTS register (extension status), respectively. <How to make a simultaneous start> Set MSY0 to 1 (bits 18 and 19) in the RMD register for the axes you want to start. Write a start command and put the LSI in the "waiting for input" status. Then, start the axes simultaneously by either of the methods described below. 1) By writing a simultaneous start command, the LSI will output a one shot signal of 8 reference clock cycles (approx. 0.4 µsec when CLK = 19.6608 MHz) from the terminal. 2) Input hardware signal from outside. Supply a hardware signal by driving the terminal with open collector output (74LS06 or equivalent). signals can be supplied as level trigger or edge trigger inputs. However, when level trigger input is selected, if = L or a start command is written, the axis will start immediately. After connecting the terminals on each LSI, each axis can still be started independently using start commands.
Page 91: Pcs Signal
input <Set MSY0 to 1 (bits 18 and 19) in PRMD> [PRMD] (WRITE) 01: Start by inputting a signal 23 - - - - n n - - Specify the input specification for the signal <Set STAM (bit 18) in [RENV1] (WRITE) RENV1> 23 - - - - - n - - 0: Level trigger input for the signal 1: Edge trigger input for the signal Read the signal <SSTA (bit 5) in RSTS> [RSTS] (READ) 0: The signal is OFF 7 0 - - n - - - - - 1: The signal is ON Read the operation status <CND (bits 0 to 3) in RSTS> [RSTS] (READ) 0010: Waiting for input 7 0 - - - - n n n n Set an event interrupt cause <Set IRSA (bit 12) in RIRQ> [RIRQ] (WRITE) 1: Output an signal when the input is ON.
Page 92: External Stop / Simultaneous Stop
11-7. External stop / simultaneous stop This LSI can execute an immediate stop or a deceleration stop triggered by an external signal using the terminal. Set MSPE (bit 24) = 1 in the PRMD register (operation mode) to enable a stop from a input. The axis will stop immediately or decelerate and stop when the terminal is LOW. However, a deceleration stop is only used for a high speed start. When the axis is started at low speed, the signal on the terminal will cause an immediate stop. The input logic of the terminal cannot be changed. When multiple LSIs are used to control multiple axes, connect all of the terminals from each LSI and input the same signal so that the axes which are set to stop on a input can be stopped simultaneously. In this case, a stop signal can also be output from the terminal. When an axis stops because the signal is turned ON, an signal can be output. By reading the REST register, you can determine the cause of an error interrupt. You can monitor terminal status by reading the RSTS register (extension status). <How to make a simultaneous stop> Set MSPE (bit 24) = 1 in the PRMD register for each of the axes that you want to stop simultaneously. Then start these axes. Stop these axes using either of the following two methods. 1) By writing a simultaneous stop command, the terminal will output a one shot signal 8 reference clock cycles in length (approx. 0.4 µsec when CLK = 19.6608 MHz). 2) Supply an external hardware signal Supply a hardware signal using an open collector output (74LS06 or equivalent). 3) The CSTP terminal will output a one shot signal for 8 reference clock cycles (approximately 0.4 µsec when CLK = 19.6608 MHz) when a stop caused by an error occurs on an axis that has MSPO = 1 in the PRMD register. Even when the terminals on LSIs are connected together, each axis can still be stopped independently by using the stop command. 1) Connect the terminals as follows for a simultaneous stop among different LSIs. +3.3V 5 k to 10 k-ohm CSTP CSTP CSTP...
Page 93: Emergency Stop
Setting to enable input <Set MSPE (bit 24) in PRMD> [PRMD] (WRITE) 1. Enable a stop from the input. (Immediate stop, deceleration stop) Auto output setting for the signal <Set to MSPO (bit 25) in the PRMD> [PRMD] (WRITE) 1: When an axis stops because of an error, the PCL will output the signal. (Output signal width: 8 reference clock cycles) 0 0 0 0 - - n - Set the to output a signal when an axis is stopped by a command <Set [RENV2] (WRITE) CSP0 (bits 13) in RENV2> 8 1: When MSP0 = 1 in the PRMD register, the PCL will output the signal - - n - - - - - even if an axis is stopped by a command. 0: The PCL will not output a signal when an axis is stopped by a command. Specify the stop method to use when the signal is turned ON. <Set STPM [RENV1] (WRITE) (bit 19) in RENV1> 23 - - - - n - - - 0: Immediate stop when the signal is turned ON. 1: Deceleration stop when the signal is turned ON. Read the signal <SSTP (bit 6) in RSTS> [RSTS] (READ) 0: The ...
Page 94: Counter
11-9. Counter 11-9-1. Counter type and input method In addition to the positioning counter, this LSI contains two other counters/axis. The positioning counter is loaded with an absolute value for the RMV register (target position) with each start command, regardless of the operation mode selected. It decreases the value with each pulse that is output. However, if MPCS (bit 14) of the RMD register (operation mode) is set to 1 and a position override 2 is executed, the counter will not decrease until the PCS input turned ON. Input to COUNTER1 and COUNTER2 can be selected as follows by setting the RENV3 register (environment setting 3). * "0": Possible to count Blank: Impossible to count COUNTER1 COUNTER2 Counter type Up/down counter Up/down counter Number of bits Output pulse Encoder (EA/EB) input Set COUNTER1 input <CIS1 (bit 0) in RENV3> [RENV3] (WRITE) 0: Output pulses - - - - - - - n 1: EA/EB input Set COUNTER2 input <CIS2 (bit 1) in RENV3> [RENV3] (WRITE) 0: EA/EB input - - - - - - n - 1: Output pulses The EA/EB input terminals, that are used as inputs for the counter, can be selected from the following two: 1) Signal input method: Input 90 phase difference signals (1x, 2x, 4x) Counter direction: Count up when the EA input phase is leading. Count down when the EB input phase is leading. 2) Signal input method: Input 2 sets of positive and negative pulses. Counter direction: Count up on the rising edge of the EA input. Count down on the falling edge of the EB input.
Page 95 Reading EA/EB input error <ESEE (bit 7 in REST> [REST] (READ) 1: An EA/EB input error occurred. 7 0 n - - - - - - - When EDIR is "0," EA/EB input and count timing will be as follows. For details about the PA/PB input, see section "9-3. Pulsar input mode." 1) When using 90 phase difference signals and 1x input 2) When using 90 phase difference signals and 2x input 3) When using 90 phase difference signals and 4x input 4) When two pulses are input (counted on the rising edge) - 89 -...
Page 96: Counter Reset
11-9-2. Counter reset The following three methods allow all the counters to latch their count value using the RENV3 (environment setting 3) register. The latched values can read from the RLTC1/2 registers. 1) When the LTC signal turns ON. 2) When the ORG signal turns ON. 3) When a command is written. The input timing of the LTC can be set in the RENV1 (environment setting 1) register. An signal can be output as an event interrupt factor when the PCL latches the count value by turning ON the LTC and ORG signals. Write a command to reset the counters. There is no external input terminal to reset the counters. However, the PCL has a function that will clear a counter soon after the count value has been latched. An external latch signal can be input so that you can use the LTC input to reset a counter from the outside. The function used to reset a counter soon after the counter value is latched is referred to as the "latch & clear function." The latch timing can be set in RENV3 (environment setting 3) register. The signal can be output to interrupt an event when it is latched by the LTC and ORG inputs. Specify the LTC signal mode <Set LTCL (bit 23) in RENV1> [RENV1] (WRITE) 0: Latch on the falling edge. 23 n - - - - - - - 1: Latch on the rising edge. Read the LTC signal <SLTC (bit 13) in RSTS> [RSTS] (READ) 0: The LTC signal is OFF 15 8 - - n - - - - - 1: The LTC signal is ON Set the COUNTER1 latch & clear function <Set CU1L (bit 4) in RENV3> [RENV3] (WRITE) 0: COUNTER1 is not cleared after it is latched. 7 0 - - - n - - - - 1: COUNTER1 is cleared soon after it is latched. ...
Page 97: Stop The Counter
Counter reset command <CUN1R to CUN2R: Bit control command> [Bit control command] 20h: Reset COUNTER1. 20h 21h 21h: Reset COUNTER2. Note: When the latch & clear function is used, and if the clear (or latch) timing matches the count timing, the counter will not become 0. It will be +1 or -1. When detecting "0" using the comparate function, be careful of these cases. 11-9-3. Stop the counter There are two methods for stopping counters: stop the count operation or set a mask on the counter input. The counter operation can be stopped for independently COUNTER1 and COUNTER2. Selection of the counter input is not related to stopping. When the count input is masked, the input to the selected counter will be stopped. A counter which is counting output pulses will stop counting if the timer mode is selected, regardless of the counter stop method selected or the setting status. If a counter is counting output pulses and PMSK = 1 in the RENV1 register, the PCL will not output pulses. However, the counter will continue counting unless it is told to stop. Stopping COUNTER1 <Set CU1H (bits 2) in RENV3> [RENV3] (WRITE) 1. Stop COUNTER1 counting operation. 7 0 - - - - - n - - Stopping COUNTER2 <Set CU2H (bits 3) in RENV3> [RENV3] (WRITE) 1. Stop COUNTER2 counting operation. 7 0 - - - - n - - - Set the count input mask for output pulses <Set MCCE (bit 11) in RMD> [RMD] (WRITE) 1: The counters set to count "output pulses" will stop. 15 8 - - - - n - - - Set the EA/EB signal input mask <Set E0FF (bit 14) in RENV2> [RENV2] (WRITE) 1: Disable the EA/EB input. 15 8 - n - - - - - - ...
Page 98: Comparator
11-10. Comparator 11-10-1. Comparator types and functions This LSI has 2 circuit 28-bit comparators per axis. These are referred to as "Comparator1" and " Comparator2." Comparator 1 compares the setting in the RCMP1 register with COUNTER1. Comparator 2 compares the setting in the RCMP2 register with COUNTER2. One of three comparison methods can be selected (=, <, and >), and the comparison results can be output to a terminal. Also, the PCL can output an signal such as an event interrupt when comparison condition is met. A special use of the comparator is to control a ring count function and internal synchronized start function. For descriptions of these functions, see "11-10-2. Ring count function" and "11-11-2. Start on an internal synchronized signal." Use the RENV2 and RENV3 registers to set the comparators. Set the comparison conditions for Comparator 1 <Set C1S1, 0 (bits 12, [RENV3] (WRITE) 13) in RENV3> 00: Turn OFF the comparator function - - n n - - - - 01: (RCMP1) = (COUNTER1) 10: (RCMP1) > (COUNTER1) 11: (RCMP1) < (COUNTER1) Set the comparison conditions for Comparator 2 <Set C2S1, 0 (bits 14, [RENV3] (WRITE) 15) in RENV3> 00: Turn OFF the comparator function n n - - - - - - 01: (RCMP1) = (COUNTER1) 10: (RCMP1) > (COUNTER1) 11: (RCMP1) < (COUNTER1) Set an event interrupt factor <Set IRC1, 2 (bits 6, 7) in RIRQ> [RIRQ] (WRITE) IRC1 (bit 6) = 1: Outputs an signal when Comparator 1 0 n n - - - - - - conditions are met. IRC2 (bit 7) = 1: Outputs an signal when Comparator 2 conditions are met. Read the event interrupt factor <Set ISC1, 2 (bits 6, 7) in RIST> [RIST] (READ) IRC1 (bit 6) = 1: When the Comparator 1 conditions are met.
Page 99: Ring Count Function
11-10-2. Ring count function COUNTER1 and COUNTER2 have a ring count function for use in controlling a rotating table. Set C1RM = 1 in RENV3 and COUNTER1 will be in the ring count mode. Then the PCL can perform the following operations. - Count value = Count up from the value in RCMP1 until reaching 0. - Count value = Count down from 0 until the count equals the value in PCMP1. Set C2RM = 1 in RENV3 and COUNTER2 will be in the ring count mode. Then the PCL can perform the following operations. - Count value = Count up from the value in RCMP2 until reaching 0. - Count value = Count down from 0 until the count equals the value in RCMP2. Set COUNTER1 to ring counter operation <set C1RM (bit-7) in RENV3> [RENV2] (WRITE) 1: Operate COUNTER1 as a ring counter. 7 0 n - - - - - - - Set COUNTER2 to ring count operation <set C2RM (bit-11) in RENV3> [RENV2] (WRITE) 1: Operate COUNTER2 as a ring counter. 15 8 - - - - n - - - Even if the value for PRMV outside the range of 0 to the value in RCMPn, the PCL will continue to perform positioning operations. When driving a rotating table with 3600 pulses per revolution, and when RCMP1 = 3599, MOD = 41h, and RMV = 7200, the table will rotate twice and the value in COUNTER1, when stopped, will be the same as the value before starting. Note: To use the ring counter function, set the count value between 0 and the value in RCMPn. If the value is outside the range above, the PCL will not operate normally. Set the comparator conditions (C1S0 to 1, C2S0 to 1) when using a counter as a ring counter to "00." Setting example RENV3 = XXXXXX80h --- COUNTER1 is in ring counter mode (C1RM = 1) RCMP1 = 4 --- Count range: 0 to 4 - 93 -...
Page 100: Synchronous Starting
11-11. Synchronous starting This LSI can perform the following operation by setting the PRMD (operation mode) register in advance. ♦ Start triggered by another axis stopping. ♦ Start triggered by an internal synchronous signal from another axis. The internal synchronous signal output is available with 6 types of timing. They can be selected by setting the RENV3 (environment setting 3) register. By setting the RIRQ (event interrupt cause) register, an signal can be output at the same time the internal synchronous signal is output. You can determine the cause of event interrupt by reading the RIST register. The operation status can be checked by reading the RSTS (extension status) register. 11-11-1. Start triggered by another axis stopping If the start condition is specified as a "Stop on two or more axes," when any of the specified axes stops after operating, and the other axes never start (remain stopped), the axis which is supposed to start when the conditions are met will start operation. Example 1 below shows how to specify a "stop on two or more axes." In the example, while the X axis (or Y axis) is working, the Y (or X) axis remains stopped. Then, the U axis starts operation when triggered by the X (or Y) axis stopping. Specify the synchronous starting method <Set MSY0 to 1 (bits 18 & 19) in PRMD> [PRMD] (WRITE) 11: Start triggered by specified axis stopping. 23 - - - - n n - - Select an axis for confirming a stop (setting example) <Specify the axis using MAX0 [PRMD] (WRITE) to Max3 (bits 20 to 23) in PRMD> 0001: Start when the X axis stops n n n n - - - - 0010: Start when the Y axis stops 0100: Start when the Z axis stops 1000: Start when the U axis stops 0011: Start when both the X and Y axes have stopped 0101: Start when both the X and Z axes have stopped 1011: Start when the X, Y, and U axes have all stopped 1111: Start when all of the axes have stopped Read the operation status <CND (bits 0 to 3) in RSTS> [RSTS] (READ) 0100: Wait for another axis to stop. 7 0 - - - - n n n n ...
Page 101 When using continuous interpolation without changing the interpolation axes, you may set the next operation in the pre-register (you don't need to specify any stop conditions) rather than using the "start when another axis stops" function. When operating the continuous interpolation with changing the interpolation axes, by using the pre- register function, you have to be careful. In this case, put a 0 in the PRMV of the axes that will not move (not be interpolated) and operate them as dummy interpolated axes. How to perform continuous interpolation while changing the interpolated axis during the interpolation operation (Linear interpolation between the X and Y axes => Linear interpolation between the X and Z axes). Step Register X axis Y axis Z axis Description PRMV 10000 5000 Linear interpolation of X: 10000, Y: PRIP 10000 10000 10000 5000. The Z axis performs a dummy interpolation operation with zero feed PRMD 0000_0063h 0000_0063h 0000_0063h amounts. Start command: Write 0751h (FH low speed start) X and Y axes start command PRMV 10000 -20000 Linear interpolation of X: 10000, Z: - 20000 PRIP 20000 20000 20000 The Y axis performs a dummy...
Page 102: Start On Internal Synchronous Signal
11-11-2. Start on an internal synchronous signal This is a function that allows a start by the same axis that is being controlled when another axis achieves a specified status. Each axis selects the internal synchronous signal (status signal) from its own axis and outputs it to the other axes. Select an axis whose internal synchronizing signal will be used to trigger itself to start. The internal synchronization signal output has 6 possible timings. Select the timing with the RENV3 register. Setting the synchronous start method <Set MSY0 to 1 (bits 18 to 19) in [PRMD] (WRITE) PRMD> 10: Start by the internal synchronize signal. - - - - n n - - Setting the internal synchronous signal output timing <Set SY01 to 3 (bits [RENV3] (WRITE) 16 to 19) in RENV3> 0001: When the Comparator1 conditions are met. - - - - n n n n 0010: When the Comparator2 conditions are met. 1000: When you want to start acceleration. 1001: When you want to finish the acceleration phase. 1010: When you want to start deceleration. 1011: When you want to finish the deceleration phase. Others: Turn OFF the internally synchronized output. Select the internally synchronized signal input <SYI0 to 1 (bit 20 to 21) in [RENV3] (WRITE) RENV3> 00: Use the internal synchronous signal output by the X axis. - - n n - - - - 01: Use the internal synchronous signal output by the Y axis. 10: Use the internal synchronous signal output by the Z axis. 11: Use the internal synchronous signal output by the U axis. Reading the operation status <CND (bits 0 to 3) in RSTS> [RSTS] (WRITE) 0011: Waiting for an internal synchronous signal - - - - n n n n Example 1 below shows a case of using the internal synchronous signal. [Setting example 1] After completing steps 1) to 3) below, write a start command to the X and Y axes, the X axis will start when the Y axis completes its acceleration. Y axis 1) Set MSY0 to 1 (bits 18 &19) in the X axis PRMD to 10. (Start with an internal synchronous signal)
Page 103 5) Set C1D0 to 1 (bits 5 & 6) in the Y axis RENV3 to 00. (Do nothing when the Comparator 1 condition are satisfied) 6) Set the RCMP1 value of the Y axis to 1000. (Comparison counter value of Comparator 1 is 1000.) 7) Write start commands for the X and Y axes. The timing chart below shows the period after the Comparator 1 conditions are established and the X axis starts. Note: In the example above, even if the Y feed amount is set to 2000 and the X feed amount is set to 1000, the X axis will be 1 when the Y axis position equals 1000. Therefore, the operation complete position will be one pulse off for both the X and Y axes. In order to make the operation complete timing the same, set the RCMP1 value to 1001 or set the comparison conditions to "Comparator 1 < comparison counter." - 97 -...
Page 104: Output An Interrupt Signal
11-12. Output an interrupt signal This LSI can output an interrupt signal ( signal) : There are 9 types of errors, 14 types of events, and change from operating to stop that can cause an signal to be output . All of the error causes will always output an signal. Each of the event causes can be set in the RIRQ register to output an signal or not. A stop interrupt is a simple interrupt function which produces an interrupt separate from a normal stop or error stop. For a normal stop interrupt to be issued, the confirmation process reads the RIST register as described in the Cause of an Event section. If your system needs to provide a stop interrupt whenever a stop occurs, it is easy to use the stop interrupt function. The signal is output continuously until all the causes on all the axes that produced interrupts have been cleared. An interrupt caused by an error is cleared by writing a "REST (error cause) register read command." An interrupt caused by an event is cleared by writing a "RIST (event cause) register read command." A Stop interrupt is cleared by writing to the main status. To determine which type of interrupt occurred, on which axis and the cause of the interrupt, follow the procedures below. 1) Read the main status of the X axis and check whether bits 2, 4, or 5 is "1." 2) If bit 2 (SENI) is "1," a Stop interrupt occurs. 3) If bit 4 (SERR) is "1," read the RESET register to identify the cause of the interrupt. 4) If bit 5 (SINT) is "1," read the RIST register to identify the cause of the interrupt. 5) Repeat steps 1) to 4) above for the Y, Z, and U axes. The steps above will allow you to evaluate the cause of the interrupt and turn the output OFF. Note 1: When reading a register from the interrupt routine, the details of the input/output buffer will change. If the signal is output while the main routine is reading or writing registers, and the interrupt routine starts, the main routine may produce an error. Therefore, the interrupt routine should execute a PUSH/POP on input/output buffer. Note 2: While processing all axes in steps 1) to 4) above, it is possible that another interrupt may occur on an axis whose process has completed. In this case, if the CPU interrupts reception mode, and is set for edge triggering, the PCL will latch the output ON and it will not allow a new interrupt to interfere. Therefore, make sure that after you have reset the interrupt reception status the CPU reads main status of all the axes again. Also, make sure there is no signal output from the PCL. Then, end the interrupt routine. Note 3: When not using the ...
Page 105 Read the interrupt status <SENI(bit2), SERR (bit 4), SINT (bit 5) in MSTSW> [MSTSW] (READ) SENI = 1: When IEND = 1 and a stop interrupt occurs, make this bit 1. After reading MSTS, it will become 0. SERR = 1: Becomes 1 when an error interrupt occurs. Becomes 0 by reading - - n n - n - - REST. SINT = 1: Becomes 1 when an event interrupt occurs. Becomes 0 by reading RIST. Set the interrupt mask <INTM (bit 29) in RENV1> [RENV1] (WRITE) 1: Mask output. 31 - - n - - - - - Setting a stop interrupt <IEDN (bit 30) in RENV2> [RENV2] (WRITE) 1: Enable a stop interrupt. 0 n - - - - - - Read the cause of the error interrupt <RREST: Read out command> [Read command] Copy the data in the REST register (error interrupt cause) to BUF. Read the event interrupt cause <RRIST: Read out command> [Read command] Copy the data in the RIST register (event interrupt cause) to BUF. Set the event interrupt cause <WRIRQ: Write command> [Write command] Write the BUF data to the RIRQ register (event interrupt cause). [Error interrupt causes] <Detail of REST: The cause of an interrupt makes the corresponding bit "1"> Cause (REST) Error interrupt cause Bit name Stopped by turning ON the +EL input ESPL Stopped by turning ON the -EL input ESML Stopped by turning ON the ALM input ESAL Stopped by turning ON the ...
Page 106: Electrical Characteristics
12. Electrical Characteristics 12-1. Absolute maximum ratings Item Symbol Rating Unit Remark Power supply voltage -0.3 to + 4.0 Input voltage -0.3 to + 7.0 Output current Storage temperature -65 to +150 12-2. Recommended operating conditions Item Symbol Rating Unit Remark 3.0 to 3.6 Power supply voltage Ambient temperature T -40 to +85 No dewing - 100 -...
Page 107: Dc Characteristics
12-3. DC characteristics Symbol Condition Item Min. Max. Unit Consumption current CLK = 30 MHz, 1 axis at 15 Mpps, no load (PCL6113) Consumption current CLK = 30 MHz, 2 axes at 15 Mpps, no (PCL6123) load Consumption current CLK = 30 MHz, 4 axes at 15 Mpps, no (PCL6143) load Input current leakage µA , , , A0 to A4, D0 to D15, CLK LOW input current µA Input terminals other than the above (Note = GND) -125 µA = V HIGH input current = 5.5 V LOW input voltage -0.3 HIGH input voltage = 6 mA LOW output voltage OL = -6 mA HIGH output voltage -0.4...
Page 108: Ac Characteristics 2) (Cpu I/F)
12-5. AC characteristics 2) (CPU I/F) 12-5-1. 16-bits I/F-1) (IF1 = L, IF0 = L) 68000 Item Symbol Condition Min. Max. Unit Address setup time for ↓ Address hold time for ↑ ↓ CS setup time for CS hold time for ↑ ↓ setup time for hold time for ↑ = 40pF SLAKR CLK ON delay time for ↓ = 40pF SLAKW CLK = 40pF SHAKR OFF delay time for ↑ = 40pF SHAKW Data output delay time for ↓ = 40pF DAKLR Data float delay time for ↑ = 40pF Data setup time for ...
Page 109: 16-Bits I/F-2 (If1=L, If0=H) H8
12-5-2. 16-bits I/F-2 (IF1=L, IF0=H) H8 Item Symbol Condition Min. Max. Unit Address setup time for ↓ Address setup time for ↓ Address hold time for , ↑ ↓ setup time for setup time for ↓ hold time for , ↑ RWCS ON delay time for ↓ = 40pF CSWT signal LOW time WAIT Data output delay time for ↓ = 40pF RDLD Data output delay time for ↑ = 40pF WTHD Data float delay time for ↑ = 40pF RDHD signal width Note 1 Data setup time for ...
Page 110: 16-Bits I/F-3 (If1=H, If0=L) 8086
12-5-3. 16-bits I/F-3 (IF1=H, IF0=L) 8086 Item Symbol Condition Min. Max. Unit Address setup time for ↓ Address setup time for ↓ Address hold time for , ↑ ↓ setup time for setup time for ↓ hold time for , ↑ RWCS ON delay time for ↓ = 40pF CSWT signal LOW time WAIT Data output delay time for ↓ = 40pF RDLD Data output delay time for ↑ = 40pF WTHD Data float delay time for ↑ = 40pF RDHD signal width Note 1 Data setup time for ...
Page 111: 8-Bits I/F 4) (If1 = H, If0 = H) Z80
12-5-4. 8-bits I/F-2 (IF1=H, IF0=H) Z80 Item Symbol Condition Min. Max. Unit Address setup time for ↓ Address setup time for ↓ Address hold time for , ↑ ↓ setup time for setup time for ↓ hold time for , ↑ RWCS ON delay time for ↓ = 40pF CSWT signal LOW time WAIT Data output delay time for ↓ = 40pF RDLD Data output delay time for ↑ = 40pF WTHD Data float delay time for ↑ = 40pF RDHD signal width Note 1 Data setup time for ...
Page 112: Operation Timing (Common For All Axes)
12-6. Operation timing (common for all axes) Item Symbol Condition Min. Max. Unit input signal length Note 1 10 T RENV2: EINF="0" EA, EB, EZ input signal length RENV2: EINF="1" 3 T RENV2: PINF="0" PA, PB input signal length RENV2: PINF="1" 3 T RENV1 : EPW = "000" 225 T 240 T RENV1 : EPW = "001" 1793 T 1920T RENV1 : EPW = "010" 7169 T 7680 T RENV1 : EPW = "011" 28673 T 30720 T ERC output signal length RENV1 : EPW = "100" 229377 T 245760 T RENV1 : EPW = "101" 917505 T 983040 T RENV1 : EPW = "110"...
Page 113 1) When the EA, EB inputs are in the 2-pulse mode o 2) When the EA, EB inputs are in the 90 phase-difference mode 3) When the PA, PB inputs are in the 2-pulse mode 4) When the PA, PB inputs are in the 90 phase-difference mode 5) Timing for the command mode (when I/M = H, and B/ = H) 6) Simultaneous start timing CSTA STABSY STAPLS Initial output pulse - 107 -...
Page 114 7) Deceleration start timing triggered by a command 8) Deceleration start timing triggered by the SD input 9) Stop timing by a command 10) Stop timing by normal automatic stop - 108 -...
Page 115 11) Stop timing by error - 109 -...
Page 116: External Dimensions
13. External Dimensions 13-1. PCL6113 - 110 -...
Page 117: Pcl6123
13-2. PCL6123 - 111 -...
Page 118: Pcl6143
13-3. PCL6143 - 112 -...
Page 119: Appendix: List Of Various Items
Appendix: List of various items Appendix 1: List of commands <Operation commands> COMB0 Symbol Description COMB0 Symbol Description CMEMG Emergency stop STAFL FL low speed start output (simultaneous CMSTA STAFH FH low speed start start) output (simultaneous High speed start 1 (FH low speed -> CMSTP STAD stop) Deceleration stop) Immediate change to FL low High speed start 2 (acceleration -> FH FCHGL STAUD speed low speed -> deceleration) Immediate change to FH low FL low speed start for remaining FCHGH CNTFL speed number of pulses FH low speed start for remaining FSCHL Decelerate to FL speed CNTFH number of pulses High speed start 1 for remaining FSCHH Accelerate to FH speed...
Page 120 <Register control commands> Register Pre-register Description Read command Write command Read command Write command Name Name COMB0 Symbol COMB0 Symbol COMB0 Symbol COMB0 Symbol Feed amount RRMV WRMV PRMV RPRMV WPRMV Initial speed RRFL WRFL PRFL RPRFL WPRFL Operation speed RRFH WRFH PRFH RPRFH WPRFH Acceleration rate RRUR WRUR PRUR RPRUR WPRUR Deceleration rate...
Page 121: Appendix 2: Label List
Appendix 2: Label list Label Type Position Description Reference Terminal name 7, 7, 7 Address bus 0 (LSB) (PCL6113, 6123, 6143) P8, 17 Terminal name 8, 8, 8 Address bus 1 (PCL6113, 6123, 6143) P8, 17 Terminal name 9, 9, 9 Address bus 2 (PCL6113, 6123, 6143) P8, 17 Terminal name 10, 10 Address bus 3 (PCL 6123, 6143) P8, 17 Terminal name 11 Address bus 4 (MSB) (PCL6143) P8, 17 Terminal name Driver alarm signal (PCL 6113) P10, 83 ALML Register bit RENV1 9 Set the input logic for the ALM signal (0: Negative, 1: Positive) P38, 83 Select the process to use when the ALM input is ON (0: Immediate stop, ALMM Register bit RENV1 8 P38, 83 1: Deceleration stop) ALMu Terminal name...
Page 122 Label Type Position Description Reference Terminal name 33, 34, 35 Data bus 15 (MSB) (PCL6113, 6123, 6143) Terminal name 17, 18, 19 Data bus 2 (PCL6113, 6123, 6143) P8 Terminal name 18, 19, 20 Data bus 3 (PCL6113, 6123, 6143) Terminal name 20, 21, 22 Data bus 4 (PCL6113, 6123, 6143) Terminal name 21, 22, 23 Data bus 5 (PCL6113, 6123, 6143) Terminal name 22, 23, 24, Data bus 6 (PCL6113, 6123, 6143) Terminal name 23, 24, 25 Data bus 7 (PCL6113, 6123, 6143) P8 Terminal name 25, 26, 27 Data bus 8 (PCL6113, 6123, 6143) Terminal name 26, 27, 28 Data bus 9 (PCL6113, 6123, 6143) Terminal name Direction signal for driving a motor (PCL6113) DIRu Terminal name 157 Motor drive direction signal for the U axis (PCL6143) DIRx Terminal name...
Page 123 FTM0 to 1 Register bit RENV1 20-21 Set a filter time constant for +EL, -EL, SD, ORG, ALM, and INP Terminal name Acceleration monitor output for the x axis. (PCL6123) Terminal name Acceleration monitor output for the y axis (PCL6123) IEND Register bit RENV2 30 Specify that the stop interrupt will be output. Terminal name 1, 1, 1 CPU-I/F mode selection 0 (PCL6113, 6123, 6143) Terminal name 2, 2, 2 CPU-I/F mode selection 1 (PCL6113, 6123, 6143) Terminal name 13, 14, 15 Busy CPU-I/F (PCL6113, 6123, 6143) P8 Terminal name In-position input (PCL6113) INPL Register bit RENV1 22 Select input logic of INP signal (0: Negative, 1: Positive) INPu Terminal name 150 In position input for the U axis (PCL6143) INPx Terminal name 42, 43 In position input for the X axis (PCL6123, 6143) INPy Terminal name 79, 74 In position input for the Y axis (PCL6123, 6143) INPz Terminal name...
Page 124 Read the main status (bits 8 to 15) MSTSW Word map name Read the main status bits (bits 0 to 15) P37, 94 MSY0 to 1 Register bit RMD 18-19 Synchronization start timing Terminal name Constant speed monitor output for the x axis (PCL6123) Terminal name Constant speed monitor output for the y axis (PCL6123) Command (Invalid command) Terminal name Zero position signal (PCL6113) ORGL Register bit RENV1 7 133 Zero point signal for U axis (PCL6143) P10 ORGu Terminal name 39, 40 Zero point signal for X axis (PCL6123, 6143) P10 ORGx Terminal name ORGy Terminal name 76, 71 Zero point signal for Y axis (PCL6123, 6143) P10 ORGz Terminal name 101 Zero point signal for Z axis (PCL6143) Register bit RENV2 29...
Page 125 Set the general-purpose output port terminal P4 LOW P4SET Command Set the general-purpose output port terminal P4 HIGH P4u/CP2u Terminal name 151 General-purpose port 4 for the U axis / Comparator 2 output (PCL6143) P4x/CP2x Terminal name 57, 58 General-purpose port 4 for the X axis / Comparator 2 output (PCL6123, 6143) P4y/CP2y Terminal name 94, 89 General-purpose port 4 for the Y axis / Comparator 2 output (PCL6123, 6143) P4z/CP2z Terminal name 120 General-purpose port 4 for the Z axis / Comparator 2 output (PCL6143) Terminal name General-purpose port 5 (PCL6113) Register bit RENV2 10 Specify the P5 terminal function P5RST Command Set the general-purpose output port terminal P5 LOW P5SET Command Set the general-purpose output port terminal P5 HIGH Terminal name General-purpose port 5 for the U axis. (PCL6143) P12 Terminal name 58, 59 General-purpose port 5 for the X axis. (PCL6123, 6143) P12 Terminal name 95, 90 General-purpose port 5 for Y axis. (PCL6123, 6143) P12...
Page 126 Label Type Position Description Reference RCUN2 Register name COUNTER2 P31, 43 Terminal name 5, 5, 5 Read signal (PCL6113, 6126, 6143) P31, 35 Register name Ramping-down point P31, 35 Register name Deceleration rate Register name S-curve range of deceleration P31, 38 RENV1 Register name Environment setting register 1 (Specify the details for the input/output terminals) P31, 38 P31, 40 RENV2 Register name Environment setting register 2 (Specify the details for the general-purpose port) P31, 42 RENV3 Register name Environment setting register 3 (Specify the details for the counters) REST Register name Error INT status P31, 46 P31, 34 Register name Operation speed P31, 34...
Page 127 WPRFL Command Write BUF data into PRFL WPRIP Command Write BUF data into PRIP WPRMD Command Write BUF data into PRMD WPRMG Command Write BUF data into PRMG WPRMV Command Write BUF data into PRMV WPRUR Command Write BUF data into PRUR WPRUS Command Write BUF data into PRUS Terminal name 6, 6, 6 Write signal (PCL6113, 6123, 6143) WRCMP1 Command Write BUF data into the RCMP1 register WRCMP2 Command Write BUF data into the RCMP2 register WRCUN1 Command Write BUF data into the RCUN1 register WRCUN2 Command Write BUF data into the RCUN2 register WRDP Command Write BUF data into the RDP register - 121 -...
Page 128 WRENV1 Command Write BUF data into the RENV1 register WRENV2 Command Write BUF data into the RENV2 register WRENV3 Command Write BUF data into the RENV3 register WRFH Command Write BUF data into the RFH register WRFL Command Write BUF data into the RFL register WRIP Command Write BUF data into the RIP register WRIRQ Command Write BUF data into the RIRQ register WRMD Command Write BUF data into the RMD register WRMG Command Write BUF data into the RMG register WRMV Command Write BUF data into the RMV register Terminal name 12, 13, 14 Wait request signal (PCL6113, 6123, 6143) WRUR Command Write BUF data into the RUR register WRUS Command Write BUF data into the RUS register - 122 -...
Page 129: Handling Precautions
[Handling Precautions] 1. Design precautions 1) Never exceed the absolute maximum ratings, even for a very short time. 2) Take precautions against the influence of heat in the environment, and keep the temperature around the LSI as cool as possible. 3) Please note that ignoring the following may result in latching up and may cause overheating and smoke. - Make sure that the voltage on the input/output terminals does not exceed the maximum ratings. - Consider power voltage drop timing when turning ON/OFF the power. - Be careful not to introduce external noise into the LSI. - Hold the unused input terminals to +3.3V or GND level. - Do not short-circuit the outputs. - Protect the LSI from inductive pulses caused by electrical sources that generate large voltage surges, and take appropriate precautions against static electricity. 4) Provide external circuit protection components so that overvoltages caused by noise, voltage surges, or static electricity are not fed to the LSI. 2. Precautions for transporting and storing LSIs 1) Always handle LSIs carefully and keep them in their packages. Throwing or dropping LSIs may damage them. 2) Do not store LSIs in a location exposed to water droplets or direct sunlight. 3) Do not store the LSI in a location where corrosive gases are present, or in excessively dusty environments. 4) Store the LSIs in an anti-static storage container, and make sure that no physical load is placed on the LSIs. 3. Precautions for installation 1) In order to prevent damage caused by static electricity, pay attention to the following. - Make sure to ground all equipment, tools, and jigs that are present at the work site. - Ground the work desk surface using a conductive mat or similar apparatus (with an appropriate resistance factor). However, do not allow work on a metal surface, which can cause a rapid change in the electrical charge on the LSI (if the charged LSI touches the surface directly) due to extremely low resistance. - When picking up an LSI using a vacuum device, provide anti-static protection using a conductive rubber pick up tip. Anything which contacts the leads should have as high a resistance as possible. - When using a pincer that may make contact with the LSI terminals, use an anti-static model. Do not use a metal pincer, if possible. - Store unused LSIs in a PC board storage box that is protected against static electricity, and make sure there is adequate clearance between the LSIs. Never directly stack them on each other, as it may cause friction that can develop an electrical charge. 2) Operators must wear wrist straps which are grounded through approximately 1M-ohm of resistance. 3) Use low voltage soldering devices and make sure the tips are grounded. 4) Do not store or use LSIs, or a container filled with LSIs, near high-voltage electrical fields, such those produced by a CRT.
Page 130: Other Precautions
6) To heat the entire package for soldering, such as infrared or superheated air reflow, make sure to observe the following conditions and do not reflow more than two times. - Temperature profile The temperature profile of an infrared reflow furnace must be within the range shown in the figure below. (The temperatures shown are the temperature at the surface of the plastic package.) - Maximum temperature The maximum allowable temperature at the surface of the plastic package is 260 C peak [A profile]. The temperature must not exceed 250 C [A profile] for more than 10 seconds. In order to decrease the heat stress load on the packages, keep the temperature as low as possible and as short as possible, while maintaining the proper conditions for soldering. 7) Solder dipping causes rapid temperature changes in the packages and may damage the devices. Therefore, do not use this method. 4. Other precautions 1) When the LSI will be used in poor environments (high humidity, corrosive gases, or excessive amounts of dust), we recommend applying a moisture prevention coating. 2) The package resin is made of fire-retardant material; however, it can burn. When baked or burned, it may generate gases or fire. Do not use it near ignition sources or flammable objects. 3) This LSI is designed for use in commercial apparatus (office machines, communication equipment, measuring equipment, and household appliances). If you use it in any device that may require high quality and reliability, or where faults or malfunctions may directly affect human survival or injure humans, such as in nuclear power control devices, aviation devices or spacecraft, traffic signals, fire control, or various types of safety devices, we will not be liable for any problem that occurs, even if it was directly caused by the LSI. Customers must provide their own safety measures to ensure appropriate performance in all circumstances. - 124 -...
Page 131 NIPPON PULSE MOTOR CO., LTD. Tokyo Office: No. 16-13, 2-chome, Hongo, Bunkyo-ku, Tokyo 113-0033, Japan Phone: 81-3-3813-8841 Fax: 81-3-3813-7049 E-mail: device@npm.co.jp http://www.pulsemotor.com U.S. Office: 1073 East Main Street, Radford, VA 24141, U.S.A. Phone: 1-540-633-1677 Fax: 1-540-633-1674 E-mail: info@nipponpulse.com http://www.nipponpulse.com MNAL. No. PCL-61XX-1 1B-5205-0.5 (5205) ims...

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