LG PB60G Service Manual page 20

DDR3 1.5V By CAP - Place these Caps near Memory
+1.5V_DDR AVDD_DDR0
L1202
BLM18PG121SN1D
Close to DDR Power Pin
AVDD_DDR0
A-MVREFCA
M8
A-MVREFCA
H1
A-MVREFDQ
CLose to Saturn7M IC
R1203
L8
240
1%
AVDD_DDR0
B2
D9
G7
K2
K8
N1
A-MVREFDQ
N9
R1
AVDD_DDR0 R9
A1
A8
C1
CLose to DDR3 C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
A-MA14
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
EAN61828901
IC1201
H5TQ1G63DFR-H9C
N3
VREFCA A0 A-MA0 A-MA0
P7
A-MA1 A-MA1
A1
P3
A-MA2 A-MA2
A2
N2
VREFDQ A3 A-MA3 A-MA3
P8
A-MA4 A-MA4
A4
P2
A-MA5 A-MA5
A5
R8
ZQ A6 A-MA6 A-MA6
R2
A7 A-MA7 A-MA7
T8
A-MA8 A-MA8
A8
R3
VDD_1 A9 A-MA9 A-MA9
L7
VDD_2 A10/AP A-MA10 A-MA10
R7
A-MA11 A-MA11
VDD_3 A11
N7
VDD_4 A12/BC A-MA12 A-MA12
T3
VDD_5 A13 A-MA13 A-MA13
A-MA14
VDD_6
M7
VDD_7 NC_5
VDD_8
M2
A-MBA0 A-MBA0
VDD_9 BA0
N8
A-MBA1 A-MBA1
BA1
M3
BA2 A-MBA2 A-MBA2
VDDQ_1 A-MCK
56
J7
R1235 C1209
A-MCK
VDDQ_2 CK
K7
R1236
VDDQ_3 CK A-MCKB
0.01uF
K9
56
VDDQ_4 CKE A-MCKB A-MCKE
A-MCKE
VDDQ_5
L2
VDDQ_6 CS
K1
VDDQ_7 ODT A-MODT A-MODT
J3
A-MRASB A-MRASB
VDDQ_8 RAS
K3
A-MCASB A-MCASB
VDDQ_9 CAS
L3
R1231
WE A-MWEB A-MWEB
10K
AVDD_DDR0
NC_1
T2
A-MRESETB A-MRESETB
NC_2 RESET
NC_3
NC_4
F3
A-MDQSL A-MDQSL
NC_6 DQSL
G3
DQSL A-MDQSLB A-MDQSLB
C7
A-MDQSU A-MDQSU
VSS_1 DQSU
B7
A-MDQSUB A-MDQSUB
VSS_2 DQSU
VSS_3
E7
A-MDML A-MDML
VSS_4 DML
D3
A-MDMU A-MDMU
VSS_5 DMU
VSS_6
E3
VSS_7 DQL0 A-MDQL0 A-MDQL0
F7
A-MDQL1 A-MDQL1
VSS_8 DQL1
F2
VSS_9 DQL2 A-MDQL2 A-MDQL2
F8
VSS_10 DQL3 A-MDQL3 A-MDQL3
H3
A-MDQL4 A-MDQL4
VSS_11 DQL4
H8
VSS_12 DQL5 A-MDQL5 A-MDQL5
G2
DQL6 A-MDQL6 A-MDQL6
H7
A-MDQL7 A-MDQL7
DQL7
VSSQ_1
D7
VSSQ_2 DQU0 A-MDQU0 A-MDQU0
C3
A-MDQU1 A-MDQU1
VSSQ_3 DQU1
C8
A-MDQU2 A-MDQU2
VSSQ_4 DQU2
C2
VSSQ_5 DQU3 A-MDQU3 A-MDQU3
A7
VSSQ_6 DQU4 A-MDQU4 A-MDQU4
A2
A-MDQU5 A-MDQU5
VSSQ_7 DQU5
B8
VSSQ_8 DQU6 A-MDQU6 A-MDQU6
A3
VSSQ_9 DQU7 A-MDQU7 A-MDQU7
DDR3 1.5V By CAP - Place these Caps near Memory
IC101
LGE2111A-W1 [MULTI]
A11 B23
A_DDR3_A[0] B_DDR3_A[0]
C14 D25
A_DDR3_A[1] B_DDR3_A[1]
B11 F22
A_DDR3_A[2] B_DDR3_A[2]
F12 G22
A_DDR3_A[3] B_DDR3_A[3]
C15 E24
A_DDR3_A[4] B_DDR3_A[4]
E12 F21
A_DDR3_A[5] B_DDR3_A[5]
A14 E23
A_DDR3_A[6] B_DDR3_A[6]
D11 D22
A_DDR3_A[7] B_DDR3_A[7]
B14 D24
A_DDR3_A[8] B_DDR3_A[8]
D12 D21
A_DDR3_A[9] B_DDR3_A[9]
C16 C24
A_DDR3_A[10] B_DDR3_A[10]
C13 C25
A_DDR3_A[11] B_DDR3_A[11]
A15 F23
A_DDR3_A[12] B_DDR3_A[12]
E11 E21
A_DDR3_A[13] B_DDR3_A[13]
B13 D23
A_DDR3_A[14] B_DDR3_A[14]
F13 G20
A_DDR3_BA[0] B_DDR3_BA[0]
B15 F24
A_DDR3_BA[1] B_DDR3_BA[1]
E13 F20
A_DDR3_BA[2] B_DDR3_BA[2]
C17 G25
A_DDR3_MCLK B_DDR3_MCLK
A17 G23
A_DDR3_MCLKZ B_DDR3_MCLKZ
B16 F25
A_DDR3_MCLKE B_DDR3_MCLKE
E14 D20
A_DDR3_ODT B_DDR3_ODT
B12 B25
A_DDR3_RASZ B_DDR3_RASZ
A12 B24
A_DDR3_CASZ B_DDR3_CASZ
C12 A24
A_DDR3_WEZ B_DDR3_WEZ
F11 E20
A_DDR3_RESET B_DDR3_RESET
B19 K24
A_DDR3_DQSL B_DDR3_DQSL
C18 K25
A_DDR3_DQSLB B_DDR3_DQSLB
B18 J21
A_DDR3_DQSU B_DDR3_DQSU
A18 J20
A_DDR3_DQSUB B_DDR3_DQSUB
E15 H24
A_DDR3_DQML B_DDR3_DQML
A21 L20
A_DDR3_DQMU B_DDR3_DQMU
D17 L23
A_DDR3_DQL[0] B_DDR3_DQL[0]
G15 J24
A_DDR3_DQL[1] B_DDR3_DQL[1]
B21 L24
A_DDR3_DQL[2] B_DDR3_DQL[2]
F15 J23
A_DDR3_DQL[3] B_DDR3_DQL[3]
B22 M24
A_DDR3_DQL[4] B_DDR3_DQL[4]
F14 H23
A_DDR3_DQL[5] B_DDR3_DQL[5]
A22 M23
A_DDR3_DQL[6] B_DDR3_DQL[6]
D15 K23
A_DDR3_DQL[7] B_DDR3_DQL[7]
G16 G21
A_DDR3_DQU[0] B_DDR3_DQU[0]
B20 L22
A_DDR3_DQU[1] B_DDR3_DQU[1]
F16 H22
A_DDR3_DQU[2] B_DDR3_DQU[2]
C21 K20
A_DDR3_DQU[3] B_DDR3_DQU[3]
E16 H20
A_DDR3_DQU[4] B_DDR3_DQU[4]
A20 L21
A_DDR3_DQU[5] B_DDR3_DQU[5]
D16 H21
A_DDR3_DQU[6] B_DDR3_DQU[6]
C20 K21
A_DDR3_DQU[7] B_DDR3_DQU[7]
Close to DDR Power Pin
EAN61828901
IC1202
H5TQ1G63DFR-H9C
N3
B-MA0 B-MA0 A0 VREFCA
P7
B-MA1 B-MA1
A1
P3
B-MA2 B-MA2
A2
N2
B-MA3 B-MA3 A3 VREFDQ
P8
B-MA4 B-MA4
A4
P2
B-MA5 B-MA5
A5
R8
B-MA6 B-MA6 A6 ZQ
R2
B-MA7 B-MA7 A7
T8
B-MA8 B-MA8
A8
R3
B-MA9 B-MA9 A9 VDD_1
L7
B-MA10 B-MA10 A10/AP VDD_2
R7
B-MA11 B-MA11
A11 VDD_3
N7
B-MA12 B-MA12 A12/BC VDD_4
T3
B-MA13 B-MA13 A13 VDD_5
B-MA14
VDD_6
M7
NC_5 VDD_7
VDD_8
M2
B-MBA0 B-MBA0
BA0 VDD_9
N8
B-MBA1 B-MBA1
BA1
M3
B-MBA2 B-MBA2 BA2
B-MCK VDDQ_1
J7
C1240 R1237 56
B-MCK
CK VDDQ_2
K7
R1238 56
B-MCKB CK VDDQ_3
0.01uF
K9
B-MCKE CKE VDDQ_4
B-MCKB
VDDQ_5
B-MCKE L2
CS VDDQ_6
K1
B-MODT B-MODT ODT VDDQ_7
J3
B-MRASB B-MRASB
RAS VDDQ_8
K3
B-MCASB B-MCASB
CAS VDDQ_9
L3
R1232
B-MWEB B-MWEB WE
10K
NC_1
AVDD_DDR1
T2
B-MRESETB B-MRESETB
RESET NC_2
NC_3
NC_4
F3
B-MDQSL B-MDQSL
DQSL NC_6
G3
B-MDQSLB B-MDQSLB DQSL
C7
B-MDQSU B-MDQSU
DQSU VSS_1
B7
B-MDQSUB B-MDQSUB
DQSU VSS_2
VSS_3
E7
B-MDML B-MDML
DML VSS_4
D3
B-MDMU B-MDMU
DMU VSS_5
VSS_6
E3
B-MDQL0 B-MDQL0 DQL0 VSS_7
F7
B-MDQL1 B-MDQL1
DQL1 VSS_8
F2
B-MDQL2 B-MDQL2 DQL2 VSS_9
F8
B-MDQL3 B-MDQL3 DQL3 VSS_10
H3
B-MDQL4 B-MDQL4
DQL4 VSS_11
H8
B-MDQL5 B-MDQL5 DQL5 VSS_12
G2
B-MDQL6 B-MDQL6 DQL6
H7
B-MDQL7 B-MDQL7
DQL7
VSSQ_1
D7
B-MDQU0 B-MDQU0 DQU0 VSSQ_2
C3
B-MDQU1 B-MDQU1
DQU1 VSSQ_3
C8
B-MDQU2 B-MDQU2
DQU2 VSSQ_4
C2
B-MDQU3 B-MDQU3 DQU3 VSSQ_5
A7
B-MDQU4 B-MDQU4 DQU4 VSSQ_6
A2
B-MDQU5 B-MDQU5
DQU5 VSSQ_7
B8
B-MDQU6 B-MDQU6 DQU6 VSSQ_8
A3
B-MDQU7 B-MDQU7 DQU7 VSSQ_9
LM1_HW600G
DDR_256
AVDD_DDR1 +1.5V_DDR
L1203
BLM18PG121SN1D
OPT
C1252
10uF
10V
AVDD_DDR1
B-MVREFCA
M8
B-MVREFCA
CLose to Saturn7M IC
H1
B-MVREFDQ
R1226
L8
AVDD_DDR1
240
1%
B2
D9
G7
K2
B-MVREFDQ
K8
N1
N9
R1
R9
AVDD_DDR1
A1
CLose to DDR3
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
T7
B-MA14
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
20120221
5
6
LGE Internal Use Only