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5
CEC
TDMS/DDC
HDMI 1
Back port
D
CEC
TDMS/DDC
HDMI 2
BD Module
CEC
TDMS/DDC
HDMI 3
Side port
R/G/B/H/V/DDC
VGA
C
VGA_AU_LIN / RIN
VGA Phone Jack
Y/Pb/Pr/
Component 1+L/R
COMP_AU_LIN / RIN
& AV Input
SC1_L / R_Out
SC1_AV Out
SC1_R/G/B/AV IN
SCART1 (Full)
SC1_L/R_IN
B
DIF+/-
Tuner
LG
AIF
TDTK-G641D
SPDIF_Out
SPDIF out
USB DP/DM
USB (SIDE)
A
5
4
CEC
MSD3704px
AMP
DVR602
VIF
SAW
SIF
SAW
4
3
DDR BUS
DDR2 512MBit
DDR BUS
DDR2 512MBit
FLASH BUS
1st: Mxic / MX25L6445EM2I-10G
Flash
32MBit
2nd: Winbond / W25Q64CVSSIG
BD Interface
BD Module(
Option )
PCMCIA BUS
PCMCIA SLOT
LVDS OUTPUT
Panel
HPR/HPL
Earphone
I2S BUS
TAS5707L
ADC Interface
KEYPAD
IR Interface
LED Interface
IR/LED
3
2
1st: Hynix / H5PS5162FFR-G7
2nd: Winbond / W9751G6JB-18
1st: Hynix / H5PS5162FFR-G7
2nd: Winbond / W9751G6JB-18
SPEAKER
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
MAIN BOARD
MAIN BOARD
MAIN BOARD
Size
Size
Size
Project Name
Project Name
Project Name
xxA(L)V833/xxE(H)L833/xxDB833
xxA(L)V833/xxE(H)L833/xxDB833
xxA(L)V833/xxE(H)L833/xxDB833
B
B
B
Date:
Date:
Date:
Wednesday, January 19, 2011
Wednesday, January 19, 2011
Wednesday, January 19, 2011
2
1
D
C
B
A
Block Diagram
Block Diagram
Block Diagram
CM Chang/Jeff Y Hsiao
CM Chang/Jeff Y Hsiao
CM Chang/Jeff Y Hsiao
Rev
Rev
Rev
1.02
1.02
1.02
Sheet
Sheet
Sheet
3
3
3
of
of
of
18
18
18
1
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