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76
IIS_SCK
75
IIS_WS
74
IIS_SD0
┆
┆
71
IIS_SD3
70
SPDIF
67
MUTEOUT
Control signal port
91
INT
89
RESETN
42
DDC_SCL
41
DDC_SDA
40
CFG_SCL
39
CFG_SDA
90
HDMI_DET
38
DEVAD
44
HDMI_5V
88
RESDL
43
NC
45
NC
HDMI 信号 input terminal
51
HDMI_CLKP
50
HDMI_CLKN
55
HDMI_D0P
54
HDMI_D0N
59
HDMI_D1P
58
HDMI_D1N
63
HDMI_D2P
62
HDMI_D2N
Power and ground
DVDD18
12, 24, 36, 51, 66,
81, 82, 112, 125
DVDD33
7, 19, 31, 68, 77,
98, 107, 120
AVDD33
47, 49, 53, 57, 61,
86, 87
DVSS
6, 13, 18, 25, 30,
37, 65, 69, 78, 80,
97, 106,
113, 118, 126
AVSS
46, 52, 56, 60, 64,
83
ANX9011L internal block diagram:
IIS bus clock
IIS signal selection
IIS bus data
IIS channel selection (no connection)
（no connection ）
Mute control signal (no connection )
Interrupt request output
Reset signal input
DDC Clock signal
DDC address/data signal
I²C bus clock
I²C address/data
Synchronization detection
I²C connection detection signal
Cable insert detection terminal
Ground
No connection
Differential clock input
Differential data input1
Differential data input 2
Differential data input 3
+1.8V digital Power
+3.3V digital Power
+3.3V analog Power
Digital ground
Analog ground
24
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