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5
VREG_S3A_1P8
D
VREG_L1_1P2
VREG_KRAIT_0P9
NOTE: Place R501 close to MSM
R501
0R
[15]
VSENSE_KRAIT_0P9
C
C513
10pF
N.M.
VREG_S4B_0P9
B
A
5
4
U100-6
PWR
AD50
VDD_DDR_CORE_1P8
VDD_QFPROM_PRG
BF2
VDD_DDR_CORE_1P8
BJ25
VDD_DDR_CORE_1P8
VDD_SDC_CDC
D2
VDD_DDR_CORE_1P8
VDD_SDC_CDC
D50
VDD_DDR_CORE_1P8
VREF_SDC
AD2
VDD_DDR_CORE_1P2
AE49
VDD_DDR_CORE_1P2
VDD_PLL1
AV2
VDD_DDR_CORE_1P2
VDD_PLL1
B4
VDD_DDR_CORE_1P2
VDD_PLL1
B26
VDD_DDR_CORE_1P2
VDD_PLL1
BG25
VDD_DDR_CORE_1P2
VDD_PLL1
BH48
VDD_DDR_CORE_1P2
VDD_PLL1
BK4
VDD_DDR_CORE_1P2
VDD_PLL1
C37
VDD_DDR_CORE_1P2
E49
VDD_DDR_CORE_1P2
VDD_PLL2
AC25
VDD_KRAIT
VDD_PLL2
AC27
VDD_KRAIT
AC29
VDD_KRAIT
VDD_PLL2
AC37
VDD_KRAIT
VDD_PLL2
AC39
VDD_KRAIT
VDD_PLL2
AC41
VDD_KRAIT
VDD_PLL2
J25
VDD_KRAIT
VDD_PLL2
J27
VDD_KRAIT
J29
VDD_KRAIT
VDD_WLAN
J37
VDD_KRAIT
J39
VDD_KRAIT
VDD_A2
J41
VDD_KRAIT
N25
VDD_KRAIT
VDD_A2
N27
VDD_KRAIT
N29
VDD_KRAIT
VDD_A1
N37
VDD_KRAIT
N39
VDD_KRAIT
VDD_A1
N41
VDD_KRAIT
U25
VDD_KRAIT
VDD_A1
U27
VDD_KRAIT
U29
VDD_KRAIT
VDD_MIPI_CSI
U37
VDD_KRAIT
U39
VDD_KRAIT
U41
VDD_KRAIT
VDD_PLL2
AG17
VDD_GFX
VDD_PLL2
AG19
VDD_GFX
AG21
VDD_GFX
VDD_EDP
AL15
VDD_GFX
VDD_PLL2
AL17
VDD_GFX
VDD_HDMI
AL23
VDD_GFX
VDD_PLL2
AL25
VDD_GFX
AR15
VDD_GFX
AR17
VDD_GFX
VDD_A2
AR19
VDD_GFX
VDD_A2
AR23
VDD_GFX
AR25
VDD_GFX
AW15
VDD_GFX
AW17
VDD_GFX
AW19
VDD_GFX
VDD_MIPI_DSI_0P4
AW23
VDD_GFX
AW25
VDD_GFX
MIPI_DSI_LDO
BB18
VDD_GFX
BB20
VDD_GFX
MSM8974
4
3
VREG_L12_1P8
VDD_QFPROM_PRG
R502
0R
F36
Star Route
AP48
U47
The Resistor between VREG_S2B_0P9 and
VREG_S2B_0P9_ISO is removed to P09
R45
AE35
N23
AE43
AG15
AF46
AR29
VREG_L12_1P8_C
AU29
(AW29)
(AE45)
C504
C505
H20
AW29
1uF
1uF
AE45
G43
AA23
J23
AC31
E21
VDD_WLAN
R505
0R
BD26
BE39
BF28
VDD_A1
R508
BD38
BC37
VREG_L12_1P8
AB8
(AB8)
(AY8, BF6)
C510
C511
(BG3)
1uF
1uF
BD8
VREG_L12_1P8
AY8
AW7
VDD_EDP
R512
N.M.
0R
(AT2, AW7)
AT2
AK4
VDD_HDMI
R511
N.M.
0R
(AH4, AK4)
AH4
VDD_A2
BF26
N.M.
BE33
R513
0R
C514
0R
BA31
GND
BB4
VDD_MIPI_DSI_0P4
VDD_MIPI_DSI_LDO
BD2
L501
2.2uH
C515
47pf
3
2
NOTE: VDD_QFPROM_PRG needs to be at typical 1.9V
when blowing fuses. VREG_L12 regulator will be set
to 1.9V for the fuse blow duration only.
For other use cases, it will be set to 1.8V typical.
Please make sure any 3rd party IC powered by VREG_L12
can tolerate a max VDD of 1.98V.
VREG_S2B_0P9_ISO
SDC_UIM_VBIAS
VREG_L12_1P8
C507
4.3uF
200mA
(G43)
(H20, J23)
(AA23, AC31)
C506
1uF
12mA
VREG_L14_1P8
40mA
VREG_L4_1P3
6mA
0R
Note:R503/R505/R508/R510 is jumper for current
measurement, would be deleted at product board.
C508 1uF
C509 1uF
VREG_L14_1P8
40mA
R510
0R
VREG_L14_1P8
C512
TX_DAC1_I/Q unused,ET unused:
R513 N.M,C514 used 0201 0ohm to GND.
1uF
Other mode:
R513 used 0201 0ohm,C514 used 0201 1uF.
<Variant Name>
<Variant Name>
<Variant Name>
Lenovo
Lenovo
Lenovo
Title
Title
Title
C503
K920
K920
K920
2.2uF
Size
Size
Size
Document Number
Document Number
Document Number
A4
A4
A4
P05. MSM8974 PWR
P05. MSM8974 PWR
P05. MSM8974 PWR
Date:
Date:
Date:
Tuesday, August 05, 2014
Tuesday, August 05, 2014
Tuesday, August 05, 2014
2
1
D
C
VREG_L11_1P25
B
A
Rev
Rev
Rev
0.11
0.11
0.11
Sheet
Sheet
Sheet
5
5
5
of
of
of
58
58
58
1
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