LG H990ds Service Manual page 119

16 15 14
L
< 4-1-11-1_PMIC_PM8996_Data > Rev_0.3
K
J
I
OPT_2 Power-on sequence
GND TBD
Hi-Z TBD
VDD PMIC will power-down
H
BACKUP BATTERY
VCOIN
C4103 C4104
47u 47u
16.05.30 Global
G
PCB_Revision
HW_REV
SW_REV
KOR N_A E/G
HDK1
0 100K 20K 0.300
F
QDM1
0_1 100K 27K 0.383
HDK2
0_2 100K 39K 0.505
REV_0 REV_0 REV_0
A 100K 51K 0.608
REV_AREV_AREV_A
B 100K 75K 0.771
REV_B REV_B C 100K 100K 0.900
D 100K 130K 1.017
E 100K 180K 1.157
F 100K 240K 1.271
16.06.28
1.0 100K DNI 1.800
REV_10
1.1 100K 360K 1.408
E
REV_1.0(Global)
R4102
PCB_REVISION
DNI
D
C
B
A
LGE Internal Use Only
16 15 14
13 12 11 10
PM_PON_RESET_N|MSM_RESIN_N JTAG_PS_HOLD|MSM_PS_HOLD
MSM_PS_HOLD
PHONE_ON_N
VOL_DOWN_PM
PMI8994_SYSOK
PM_PON_RESET_N
+VPWR
+1V8_VREG_S4A
SENSOR_PWR_EN
VCOIN
WTR1_XO_IN
WTR0_XO_IN
LNBBCLK_CXO2
BBCLK1_EN
BBCLK1_CXO
SLEEP_CLK
X4100
1RAE19200BAA
4 3
SENSOR XTAL2
1 2
XTAL1 GND1
19.2M
EAW62883701
C4105
1n
Place caps close to PMIC
VREG_XO is PM8994 VREG_L7
VREG_RF_CLK is PM8994 VREG_L5
13 12 11 10
9 8 7
PMIC_SPMI_CLK
PMIC_SPMI_DATA
C4111
DNI
115 88
PS_HOLD GPIO_01
130 42
KPD_PWR_N GPIO_02
R4106 191 41
CBL_PWR_N GPIO_03
177 26
DNI
PON_1 LPG_DRV1/GPIO_04
131 104
RESIN_N LPG_DRV2/GPIO_05
148 102
TP4101
SHDN_N BAT_ALARM_IN/GPIO_06
86
LPG_DRV3/GPIO_07
40
162
PON_RESET_N LPG_DRV4/GPIO_08
190
LPG_DRV5/GPIO_09
118 174
VPH_PWR LPG_DRV6/BB_CLK2_EN/GPIO_10
185 159
VPH_PWR_2 RF_CLK1_EN/GPIO_11
63 144
VDD_SNS RF_CLK2_EN/GPIO_12
189
LN_BBCLK_EN/GPIO_13
155 188
VDD_MSM_IO CHGR_INT/GPIO_14
158
TP4104
DIV_CLK1/SLEEP_CLK2/GPIO_15
163 143
VCTRL DIV_CLK2/SLEEP_CLK3/GPIO_16
187
DIV_CLK3/SLEEP_CLK4/GPIO_17
154 172
VCOIN DIV_CLK4/SLEEP_CLK5/GPIO_18
157
EXT_REG_EN1/GPIO_19
169 142
VREF_DDR EXT_REG_EN2/GPIO_20
141
BAT_ALARM_OUT/BAT_ALARM_IN/GPIO_21
153 126
VREF_EBI0_CA GPIO_22
168
VREF_EBI1_CA
110
AMUX_PU1
U4100
184
VREF_EBI0_DQ
79
139
VREF_EBI1_DQ AMUX_HW_ID
PM8996
68 50
RF_CLK1 AMUX_0
53 65
RF_CLK2 AMUX_1
80
AMUX_2
69 111
LN_BB_CLK AMUX_3
94
QCT ref schematic revB
AMUX_4
22 49
TP4102
BB_CLK1_EN AMUX_5
54
BB_CLK1
70 116
BB_CLK2 VREF_PADS/MPP_01
85
US_EURO_HS_SEL/MPP_02
72 39
SLEEP_CLK VREF_DAC/MPP_03
55
HDMI_EN/MPP_04
66 161
VREF_XO_THERM SPKR_BOOST_EN/MPP_05
96 192
XO_THERM ENET_RST_N/MPP_06
160
81
GND_XOADC MPP_07
145
PRIVACY_LED/MPP_08
7
XTAL_19M_IN
6
XTAL_19M_OUT
VI
C4106 1u
23 117
VREG_XO AVDD_BYP
38 132
GND_XO DVDD_BYP
C4109 1u
8 156
VI
VREG_RF_CLK REF_BYP
83 140
GND_RF GND_REF
51
GND_CLKS_XO
CONNECT GND FROM PIN TO CAPACITOR,
THEN TO SYSTEM GND
9 8 7
119
6 5 4
5V_VCONN_BOOST_EN
VOL_UP_PM
SBU_SEL
16M_AVDD_EN
8M_AVDD_EN
WLAN_POWER_ON
HIFI_MODE2
HIFI_LDO_SW
LCD_AOD_BL_EN
TOL=0.01
C4100 33p
R4109
CODEC_MCLK
51
PMI_CLK_IN
AOD_RTC
WIFI_SLEEP_CLK
BT_POWER_ON
PMI_SPON
BAT_LOW_ALARM
LDAF_EN
VI
R4110
+1V8_VREG_L8A
100K
0.01
PCB_REVISION
PM_USB_ID
Bd_THERM_2
PA_THERM_0
VREF_SDC_UIM_APC
VREF_DAC_MPP_3
STAT_SMB1350
Even number MPPs can be configured for current sinks, up to 40 mA in 5 mA
VI
Odd number MPPs can be configured for output voltage buffers
C4107 1u
C4108 0.1u
C4110 0.1u
CONNECT GND FROM PIN TO CAPACITOR,
THEN TO SYSTEM GND
6 5 4
3 2 1
L
K
J
I
H
G
F
E
D
C
B
LG Electronics
A
TITLE
Schematic1
SIZE DWG NO REV
A2 PDM NUMBER Rev
DRAWN BY SHEET of Date
User Name 4-1-2_PMIC_PM8941 26 Drawing Date
3 2 1