Sharp SD-AT1000H Service Manual page 47

IC102 VHiAK4586VQ-1: ADC/DAC/DIR Converter (AK4586VQ) (2/2)
Pin No.
Terminal Name
41 RX2
2
42 I C
43 RX1
44 PDN
Notes :
1. Grouping of the channels can be set with DZFM2-0 bit.
2. This pin turns to an OVF pin if the OVFE bit is set to "1".
3. Except for the internal bias pins, any of the digital input pins must not be floated.
XTI/EXTCLK
Input/Output
Input Receiver channel input 2 pin. (Internal bias pin)
Input Serial control mode selection pin. "L" : 4-line serial, "H" : I2C bus
Input Receiver channel input 1 pin. (Internal bias pin)
Input Power down & reset pin.
When this pin is set to "L", it falls into power down state; all the output pins change to "L"
and the register is initialized. If CAD1-0 is switched, reset it using the PDN pin.
44 43 42 41 40 39 38 37 36 35 34
XTO 1
2
DVDD 3
DVSS 4
TVDD 5
6
TX
AK4586VQ
MCKO 7
8
LRCK
9
BICK
10
SDTO
11
SDTI1
12 13 14 15 16 17 18 19 20 21 22
Figure 47 BLOCK DIAGRAM OF IC
Function
IC102
– 47 –
RIN
33
LIN
32
LOUT1
31
LOUT1
30
ROUT2
29
LOUT2
28
ROUT3
27
LOUT3
26
25 DZF1
VCOM
24
23 VREFH
SD-AT1000H