Runtime Error Logging; Memory Configuration; Sata Configuration - Viglen Vig451J Manual

Table of Contents

Runtime Error Logging

Opens the Runtime Error Logging submenu

 ECC Memory Error Logging

Specifies whether ECC memory errors will be recognised and entered in the

SMBIOS event log.

1. Enabled – both single-bit memory errors and multi-bit memory errors will be

entered in the SMBIOS event log

2. Multi-bit Errors Only – only multi-bit memory errors will be entered in the

SMBIOS event log

3. Disabled – no memory errors will be entered into the SMBIOS event log

 PCI Error Logging

Specifies whether PCI errors will be entered in the SMBIOS event log.

o To be able to recognise PCI errors, the creation of PERR# (PCI parity errors) or

SERR# (PCI system errors) must be enabled in advance in the menu PCI

Subsystem Settings.

1. Disabled – no PCI errors will be entered in the SMBIOS event log

2. Enabled – PCI errors will be entered in the SMBIOS event log

Opens the Memory Configuration submenu

 DDR Performance

The memory modules can operate at various speeds (frequencies). The

performance increases with higher speeds, on the other hand the energy-saving

increases with lower speeds. The possible memory speeds are determined by the

particular memory module configuration.

1. Low-Voltage Optimised – Highest possible speed at low voltage

2. Energy Optimised – lowest possible speed, to save energy

3. Performance Optimised – Highest possible speed, for the best performance

Opens the SATA configuration submenu.

 SATA Mode

Specifies in which mode the SATA ports will be operated.

1. Disabled – the SATA port is disabled

2. IDE – the SATA port is operated in IDE Mode

3. AHCI – the SATA port is operated in AHCI Mode

Vig451J Motherboard Manual

Table of Contents