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User's Guide
Programmable PMICs: TPS6593-Q1 Default Configuration
for TPS6593EVM
This User's Guide can be used as a guide for using the TPS6593-Q1 power management integrated circuits
(PMICs) into a custom system. This document provides the default non-volatile memory (NVM) settings,
state transitions, and power sequencing for the PMIC. Steps for programming this device can be found in
Programmable PMICs: Design Guide for Programming in Evaluation and
1
Introduction.............................................................................................................................................................................2
2 Device Versions......................................................................................................................................................................
3 Default Configuration.............................................................................................................................................................
Settings................................................................................................................................................................4
4.2 Device Identification Settings.............................................................................................................................................
4.3 BUCK Settings...................................................................................................................................................................
Settings......................................................................................................................................................................7
4.5 VCCA and VMON Settings................................................................................................................................................
4.6 GPIO Settings....................................................................................................................................................................
4.7 Finite State Machine (FSM) Settings...............................................................................................................................
4.8 Interrupt Settings..............................................................................................................................................................
Settings...................................................................................................................................................13
4.10 Miscellaneous Settings..................................................................................................................................................
Settings............................................................................................................................................................15
4.12 Multi-Device Settings.....................................................................................................................................................
4.13 Watchdog Settings.........................................................................................................................................................
5 Pre-Configurable Finite State Machine (PFSM) Settings..................................................................................................
5.1 Configured States............................................................................................................................................................
5.2 State Transitions..............................................................................................................................................................
5.3 Power Sequences............................................................................................................................................................
6 References............................................................................................................................................................................
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SLVUC24 - MAY 2021
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ABSTRACT

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Settings..........................................................................................................................4
Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM
Copyright © 2021 Texas Instruments Incorporated
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Summary of Contents for Texas Instruments TPS6593-Q1

  • Page 1: Table Of Contents

    TPS6593EVM ABSTRACT This User’s Guide can be used as a guide for using the TPS6593-Q1 power management integrated circuits (PMICs) into a custom system. This document provides the default non-volatile memory (NVM) settings, state transitions, and power sequencing for the PMIC. Steps for programming this device can be found in Programmable PMICs: Design Guide for Programming in Evaluation and Production.
  • Page 2: Introduction

    1 Introduction This guide describes the default NVM settings of the TPS6593-Q1 programmable device. These default settings are intended to support a wide variety of systems, with various interface options and power requirements. This user's guide does not provide information about the electrical characteristics, external components, package, or the functionality of the PMIC.
  • Page 3 Ground for I2C1 address 0x28, Rising edge will change I2C1 address to 0x2C GPIO10 GPIO11 *Only Required if using SPI to configure or program the device. Figure 3-1. Default Configration of TPS6593-Q1 SLVUC24 – MAY 2021 Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 4: Static Nvm Settings

    4 Static NVM Settings The TPS6593-Q1 device consists of fixed registers and configurable registers that are loaded from NVM. For all NVM registers, the initial NVM settings that load into the registers are provided in this section. Note: these initial NVM settings, unless stated otherwise, can be changed once the PMICs have transitioned into ACTIVE state.
  • Page 5: Device Identification Settings

    Disabled; OV, UV, SC, and ILIM comparators. BUCK2_VSEL BUCK2_VOUT_1 BUCK2_PLDN Enabled; Pull-down resistor BUCK2_RV_SEL Disabled BUCK2_CONF BUCK2_SLEW_RATE 5.0 mV/μs BUCK2_ILIM 4.5 A SLVUC24 – MAY 2021 Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 6 BUCK4_OV_THR +10% / +100mV BUCK4_UV_THR -10% / -100 mV BUCK5_PG_WINDOW BUCK5_OV_THR +10% / +100 mV BUCK5_UV_THR -10% / -100 mV Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM SLVUC24 – MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 7: Ldo Settings

    250 Ohm LDO4_RV_SEL Disabled LDO1_VOUT LDO1_VSET 0.60 V LDO1_BYPASS Linear regulator mode. LDO2_VOUT LDO2_VSET 0.60 V LDO2_BYPASS Linear regulator mode. SLVUC24 – MAY 2021 Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 8: Vcca And Vmon Settings

    Note: the contents of the GPIOx_SEL field determine which other fields in the GPIOx_CONF and GPIO_OUT_x registers are applicable. To understand which NVM fields apply to each GPIOx_SEL option, see the Digital Signal Descriptions section in TPS6593-Q1 datasheet. Table 4-7. GPIO NVM Settings...
  • Page 9 GPIO8_OD Push-pull output GPIO8_DIR Input GPIO8_SEL GPIO8 GPIO8_PU_SEL Pull-down resistor selected GPIO8_PU_PD_EN Disabled; Pull-up/pull-down resistor. GPIO8_DEGLITCH_EN No deglitch, only synchronization. SLVUC24 – MAY 2021 Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 10: Finite State Machine (Fsm) Settings

    These settings describe how the PMIC output rails are assigned to various system-level states. Also, the default trigger for each system-level state is described. All these settings can be changed though I C after startup. Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM SLVUC24 – MAY 2021 Submit Document Feedback...
  • Page 11: Interrupt Settings

    Not masked GPIO10_FSM_MASK_POL Low; Masking sets signal value to '0' GPIO11_FSM_MASK Not masked GPIO11_FSM_MASK_POL Low; Masking sets signal value to '0' SLVUC24 – MAY 2021 Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 12 Interrupt generated GPIO3_RISE_MASK Interrupt generated GPIO4_RISE_MASK Interrupt generated GPIO5_RISE_MASK Interrupt generated GPIO6_RISE_MASK Interrupt generated GPIO7_RISE_MASK Interrupt generated GPIO8_RISE_MASK Interrupt generated Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM SLVUC24 – MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 13: Powergood Settings

    These settings detail the default configurations for what is monitored by PGOOD pin. All these settings can be changed though I C after startup. SLVUC24 – MAY 2021 Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 14: Miscellaneous Settings

    SS_DEPTH No modulation FSM_STEP_SIZE PFSM_DELAY_STEP USER_SPARE_REGS USER_SPARE_1 USER_SPARE_2 USER_SPARE_3 USER_SPARE_4 ESM_MCU_MODE_ CFG ESM_MCU_EN ESM_MCU disabled. ESM_SOC_MODE_ CFG ESM_SOC_EN ESM_SoC disabled. Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM SLVUC24 – MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 15: Interface Settings

    These settings detail the default watchdog settings. These settings can be changed though I C after startup. Table 4-14. Watchdog NVM Settings TPS6593-Q1 Register Name Field Name Value Description WD_LONGWIN_CFG WD_LONGWIN WD_THR_CFG WD_EN SLVUC24 – MAY 2021 Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 16: Pre-Configurable Finite State Machine (Pfsm) Settings

    Pre-Configurable Finite State Machine (PFSM) Settings www.ti.com 5 Pre-Configurable Finite State Machine (PFSM) Settings This section describes the default PFSM settings of the TPS6593-Q1 device. These settings cannot be changed after device startup. They are only changed through reprogramming of the device. 5.1 Configured States In this PDN, the following three power states are configured into the PMIC devices: •...
  • Page 17: State Transitions

    This is to prevent any damage of the PMICs in case of over voltage on VCCA or thermal shutdown. The sequence is shown in Figure 5-2. SLVUC24 – MAY 2021 Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 18 LDO1 LDO2 TPS6593-Q1 0 us LDO2 LDO3 TPS6593-Q1 0 us LDO3 LDO4 TPS6593-Q1 0 us LDO4 Figure 5-2. TO_SAFE_SEVERE Sequence Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM SLVUC24 – MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 19: References

    Programmable PMICs: Design Guide for Programming TPS6593-Q1 in Evaluation and Productionuser's guide • Texas Instruments, Scalable PMIC's GUI user's guide • Texas Instruments, TPS6593-Q1 Power Management IC (PMIC) for Processors with 5 Bucks and 4 LDOs user's guide • Texas Instruments, TPS6594-BOOSTXL user’s guide • Texas Instruments, TPS6594-Q1 Schematic PCB Checklist •...
  • Page 20 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
  • Page 21 www.ti.com Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product.
  • Page 22 www.ti.com Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à...
  • Page 23 www.ti.com EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices.
  • Page 24 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2019, Texas Instruments Incorporated...
  • Page 25 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2021, Texas Instruments Incorporated...

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