POST Code (Hex)
08h
FFh
FFh
FFh
0Ah
0Bh
0Ch
FFh
0Eh
FFh
13h
13h
FFh
C1h
FFh
FFh
C2h
FFh
FFh
FFh
20h
FFh
FFh
FFh
68
Init CPU_FAR
OEM BOARD_B_Init KBC8042_FAR
Init KBC8042_FAR
KBC BatTest_FAR
Init KBC8042_FAR
Program KBC Command Byte_FAR
Init KBC8042_FAR
Init KBC8042_FAR
Init Input Devices_FAR
Detect PS2 Mouse_FAR
Init KBC8042_FAR
Detect PS2 KeyBoard_FAR
Init KBC8042_FAR
OEM BOARD_A_OEM_ReCalcCPUFreq_FAR
Init Input Devices_FAR
Init Input Devices_FAR
Check Install POST INT09hHandler_FAR
Init Input Devices_FAR
Cp Init At EarlyPOST_FAR;
Global Device Init At Early POST_FAR
NB_Init At Early POST_FAR
Cp Init At Early POST_FAR
NB PCIE_Init At Early POST_FAR
NB_Init At Early POST_FAR
SB_Init At Early POST_FAR
Cp Init At Early POST_FAR
SB_Fill Device SubVenDevID_FAR
SB_Init At Early POST_FAR
SB PCIE_Init At Early POST_FAR
SB_Init At Early POST_FAR
OEM_Init At Early POST_FAR
Cp Init At Early POST_FAR
OEM BOARD_A_OEM_Init At Early POST_FAR
OEM_Init At Early POST_FAR
EPP_Dram_Voltage
OEM_Init At Early POST_FAR
CER_CHECK_S4_STATE
OEM_Init At Early POST_FAR
Smi Init At Early Post_FAR
Cp Init At Early POST_FAR
BR04_INIT_FAR
Smi Init At Early Post_FAR
far USB Port_Enable USB In Chipset
Cp Init At Early POST_FAR
far USB Reserve Data Area
far USB Port_Enable USB In Chipset
POST Routine Description
Chapter 4
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