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Errata
MSP430FG6426 Microcontroller
This document describes the known exceptions to the functional specifications (advisories).
1 Functional Advisories............................................................................................................................................................
2 Preprogrammed Software Advisories..................................................................................................................................
3 Debug Only Advisories..........................................................................................................................................................
4 Fixed by Compiler Advisories...............................................................................................................................................
5 Nomenclature, Package Symbolization, and Revision Identification................................................................................
Nomenclature.........................................................................................................................................................4
Markings..............................................................................................................................................................4
5.3 Memory-Mapped Hardware Revision (TLV Structure).......................................................................................................
Descriptions............................................................................................................................................................6
7 Revision History...................................................................................................................................................................
SLAZ669P - MAY 2015 - REVISED AUGUST 2021
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ABSTRACT
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Copyright © 2021 Texas Instruments Incorporated
Table of Contents
MSP430FG6426 Microcontroller
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Summary of Contents for Texas Instruments Errata MSP430FG6426
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Page 1: Table Of Contents
5 Nomenclature, Package Symbolization, and Revision Identification................5.1 Device Nomenclature.................................4 5.2 Package Markings................................4 5.3 Memory-Mapped Hardware Revision (TLV Structure)....................... 6 Advisory Descriptions................................6 7 Revision History................................... SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 2: Functional Advisories
Advisories that affect only debug operation. ✓ The check mark indicates that the issue is present in the specified revision. Errata Number ✓ EEM16 MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 3: Fixed By Compiler Advisories
Options: Check -msilicon-errata= and -msilicon-errata-warn= options • MSP430 GCC User's Guide IAR Embedded Workbench • IAR workarounds for msp430 hardware issues SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 4: Nomenclature, Package Symbolization, And Revision Identification
XMS – Experimental device that is not necessarily representative of the final device's electrical specifications MSP – Fully qualified production device Support tool naming prefixes: X: Development-support product that has not yet completed Texas Instruments internal qualification testing. null: Fully-qualified development-support product. XMS devices and X development-support tools are shipped against the following disclaimer: "Developmental product is intended for internal evaluation purposes."... -
Page 5: Memory-Mapped Hardware Revision (Tlv Structure)
Further guidance on how to locate the TLV structure and read out the HW_ID can be found in the device User's Guide. SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... -
Page 6: Advisory Descriptions
None. It is recommended not to use POPM instruction on the Status Register. Refer to the table below for compiler-specific fix implementation information. MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... - Page 7 In such cases the trace buffer incorrectly displays the first instruction of the loop as the instruction that is executed immediately after exiting the loop. Example: SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 8 Notes For the command line version add the following information Compiler: IAR Embedded Workbench IAR EW430 v5.51 or later --hw_workaround=CPU40 Assembler:-v1 MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 9 DAC Module Category Functional Function Switching events on alternative DAC output pins can change output level of active DAC output pin. SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 10 2. Disable all DMA channels during read-modify-write instruction of specific module registers containing interrupts flags while these interrupts are activated. MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 11 None. Use other conditional/advanced triggered breakpoints to halt the debugger right after Flash erase/write instructions. Note This erratum affects debug mode only. SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 12 Function LCD outputs may be corrupted by modifying register fields VLCDx and/or LCDCPEN of LCDCVCTL register while LCDON (LCDCCTL0) is set MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 13 100 cycles for core voltage levels 0, 1, 2, or 3, respectively, before re-enabling the module. (for example, __delay_cycles(100) PMM14 PMM Module Category Functional SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 14 The affected SVSMLCTL register settings are shaded in the following table. -The SVSH/SVMH module is configured to transition from Normal mode to an OFF MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 15 ((SVSMHCTL & SVSHE) && (!(SVSMHCTL & SVSHFP))) if ( (!(SVSMHCTL & SVSHMD)) || ((SVSMHCTL & SVSHMD) && (SVSMHCTL & SVSMHACE)) ) return 1; // SVSH affected configurations SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 16 This is achieved if the SVSL or the SVML is configured in "Normal" performance mode (not disabled and not in "Full" Performance Mode). MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 17 LPM3.5 or LPM4.5, it is possible that the interrupt is lost. Hence this interrupt will not trigger a wakeup from LPMx.5. Workaround None SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 18 Clear all the fault flags in UCSCTL7 register once after changing any of the SELM/SELS/ SELA bits in the UCSCTL4 register. If OFIFG-NMI is enabled during clock switching, disable OFIFG-NMI interrupt during MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 19 // PTxData = pointer to transmit in the ISR PTxData = TXData; // restore the transmit buffer pointer if the Start bit is set if(IFG2&UCB0TXIFG) SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 20 Assembly example: bic #UCNACKIE+UCSTPIE+UCSTTIE, UCBxIE ; disable all self-clearing interrupts EINT bis #UCNACKIE+UCSTPIE+UCSTTIE, UCBxIE ; enable all self-clearing interrupts MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
- Page 21 Reinitialize TXBUF before using SPI and after each transmission. If transmit data needs to be repeated with the next transmission, then write back previously read value: UCAxTXBUF = UCAxTXBUF; SLAZ669P – MAY 2015 – REVISED AUGUST 2021 MSP430FG6426 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
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Page 22: Revision History
Changes from July 14, 2021 to August 27, 2021 Page • TB25 was added to the errata documentation....................6 • TB25 Description was updated.........................18 • TB25 Workaround was updated........................MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated... - Page 23 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2021, Texas Instruments Incorporated...
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