LG 32BL95U Service Manual page 29

DDR3(2Gb/1Gb x 4)
VTT_0.75V
IC1000
NT5CB64M16GP-FL
C1000
R1000
0.1uF
100 16V
AB_TMA10
DDR3 SDRAM
R1001
C1001
100 0.1uF N3
AB_TMA9 AB_TMA0
16V A0 VREFCA
R1002 P7
C1002 AB_TMA1
AB_TMA13 100 A1
0.1uF P3
AB_TMA2
16V A2
AR1000 N2
AB_TMA3
100 C1003 A3 VREFDQ
AB_TMA14 0.1uF AB_TMA4 P8
A4
16V
P2
AB_TMA8 AB_TMA5
A5
R8
AB_TMA11 AB_TMA6
A6
R2
AB_TMA6 AB_TMA7
A7
T8
AB_TMA8
A8
AR1001 R3
AB_TMA9
100 A9 VDD_1
AB_TMA1 L7
AB_TMA10
A10/AP VDD_2
R7
AB_TMA4 AB_TMA11
A11 VDD_3
N7
AB_TMA12 AB_TMA12
A12/BC VDD_4
T3
AB_TMBA1 C1004 AB_TMA13
NC_6 VDD_5
0.1uF
16V VDD_6
AR1002
AB_TMA15 M7
100 C1005 VDD_7
0.1uF NC_5
AB_TMA7 16V
VDD_8
M2
AB_TMA2 C1006 AB_TMBA0
BA0 VDD_9
0.1uF N8
AB_TMA5 AB_TMBA1
16V BA1
M3
AB_TMA0 AB_TMBA2
C1007 BA2
0.1uF
16V VDDQ_1
AR1003
J7
100 AB_TMCK
C1008 CK VDDQ_2
K7
AB_TMA3 0.1uF AB_TMCKB
16V CK VDDQ_3
K9
AB_TMBA2 A_TMCKE
C1009 CKE VDDQ_4
0.1uF
AB_TMBA0
16V VDDQ_5
AB_TMA15 A_TMCSB0 L2
CS VDDQ_6
C1010
0.1uF K1
AB_TMODT
16V ODT VDDQ_7
AR1004 J3
100 C1011 AB_TMRASB
RAS VDDQ_8
0.1uF K3
AB_TMWEB AB_TMCASB
16V CAS VDDQ_9
L3
AB_TMCASB AB_TMWEB
C1012 WE
0.1uF
AB_TMRASB
16V
T2
AB_TMODT C1013 AB_TMRESETB
RESET
0.1uF
16V
OPT
R1003 C1014
100 F3
B_MCKE 0.1uF A_TMDQSL
16V DQSL
R1004 A_TMDQSLB G3
56 C1015 DQSL
B_MCK
0.1uF
R1005
16V
56 C7
B_MCKB A_TMDQSU
C1016 DQSU VSS_1
OPT B7
R1006 0.1uF A_TMDQSUB
16V DQSU VSS_2
AB_TMRESETB 100
C1017 VSS_3
0.1uF A_TMDML E7
16V DML VSS_4
D3
A_TMDMU
DMU VSS_5
VSS_6
E3
A_TMDQL0
DQL0 VSS_7
F7
A_TMDQL1
DQL1 VSS_8
F2
A_TMDQL2
DQL2 VSS_9
A_TMDQL3 F8
VSS_10
DQL3
H3
A_TMDQL4
DQL4 VSS_11
H8
A_TMDQL5
DQL5 VSS_12
G2
A_TMDQL6
DQL6
H7
A_TMDQL7
DQL7
VSSQ_1
D7
A_TMDQU0
DQU0 VSSQ_2
C3
A_TMDQU1
DQU1 VSSQ_3
C8
A_TMDQU2
DQU2 VSSQ_4
C2
A_TMDQU3
DQU3 VSSQ_5
A_TMDQU4 A7
DQU4 VSSQ_6
A2
A_TMDQU5
DQU5 VSSQ_7
B8
A_TMDQU6
DQU6 VSSQ_8
A3
A_TMDQU7
DQU7 VSSQ_9
+1.5V_DDR_S
C1020
C1025 C1028 C1031 C1034 C1038 C1041 C1046 C1050 C1054
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V 16V
10V 16V
+1.5V_DDR_S
C1021
C1026 C1029 C1032 C1035 C1039 C1042 C1047 C1051 C1055
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V 16V 16V
10V
+1.5V_DDR +1.5V_DDR_S
L1003
BLM15PX121SN1
OPT
L1004
BLM15PX121SN1
C1151 C1152 C1153
22uF 10uF 10uF
16V 10V 10V
IC1003
+1.5V_DDR
UR5512G-SH2-R
[EP]GND
VIN NC_3
1 8
C1027
10uF
10V GND NC_2
R1011 2 7
+3.3V_NORMAL
100K
1%
VREF VCNTL
3 6
2A
VOUT NC_1 C1045
C1022
R1012 4 5
1uF
100K 0.1uF
1% 10V
16V
VTT_0.75V
C1030 C1033 C1036
10uF 10uF 10uF
10V 10V 10V
MIU0 : CPU, GraphicEngine, FrameBuffer0
MIU1 : OD,FrameBuffer1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+1.5V_DDR_S DDR_AB_VREF
R1016
1K
1%
R1017 C1037 C1040 IC1004
1K 0.1uF 1000pF
16V NT5CB64M16GP-FL
1% 50V
DDR_AB_VREF
DDR_AB_VREF
DDR3 SDRAM
M8 N3 M8
AB_TMA0
A0 VREFCA
P7
AB_TMA1
A1
P3
AB_TMA2
A2
H1 N2 H1
AB_TMA3
A3 VREFDQ
AB_TMA4 P8
A4
R1015 R1036
P2
240 AB_TMA5 240
1% A5 1%
L8 R8 L8
AB_TMA6
ZQ A6 ZQ
R2
AB_TMA7
A7
T8
AB_TMA8
A8
B2 R3 B2
AB_TMA9
A9 VDD_1
D9 AB_TMA10 L7 D9
A10/AP VDD_2
G7 R7 G7
AB_TMA11
A11 VDD_3
K2 N7 K2
AB_TMA12
A12/BC VDD_4
K8 T3 K8
AB_TMA13
NC_6 VDD_5
N1 N1
+1.5V_DDR_S VDD_6
N9 AB_TMA15 M7 N9
VDD_7
NC_5
R1 R1 +1.5V_DDR_S
VDD_8
R9 M2 R9
AB_TMBA0
BA0 VDD_9
N8
AB_TMBA1
BA1
M3
AB_TMBA2
BA2
A1 A1
VDDQ_1
A8 J7 A8
B_MCK
CK VDDQ_2
C1 K7 C1
B_MCKB
CK VDDQ_3
C9 K9 C9
B_MCKE
CKE VDDQ_4
D2 D2
VDDQ_5
E9 B_TMCSB1 L2 E9
CS VDDQ_6
F1 K1 F1
AB_TMODT
ODT VDDQ_7
H2 J3 H2
AB_TMRASB
RAS VDDQ_8
H9 K3 H9
AB_TMCASB
CAS VDDQ_9
L3
AB_TMWEB
WE
J1 J1
NC_1 NC_1
J9 T2 J9
AB_TMRESETB
NC_2 RESET NC_2
L1 L1
NC_3 NC_3
L9 L9
NC_4 NC_4
T7 F3 T7
AB_TMA14 B_TMDQSL AB_TMA14
NC_7 DQSL NC_7
B_TMDQSLB G3
DQSL
DDR3_A
A9 C7 A9
B_TMDQSU
DQSU VSS_1
B3 B7 B3
B_TMDQSUB
DQSU VSS_2
E1 E1
VSS_3
G8 G8
B_TMDML E7
DML VSS_4
J2 D3 J2
B_TMDMU
DMU VSS_5
J8 J8
VSS_6
M1 E3 M1
B_TMDQL0
DQL0 VSS_7
M9 F7 M9
B_TMDQL1
DQL1 VSS_8
P1 F2 P1
B_TMDQL2
DQL2 VSS_9
P9 B_TMDQL3 F8 P9
VSS_10
DQL3
T1 H3 T1
B_TMDQL4
DQL4 VSS_11
T9 H8 T9
B_TMDQL5
DQL5 VSS_12
G2
B_TMDQL6
DQL6
H7
B_TMDQL7
DQL7
B1 B1
VSSQ_1
B9 D7 B9
B_TMDQU0
DQU0 VSSQ_2
D1 C3 D1
B_TMDQU1
DQU1 VSSQ_3
D8 C8 D8
B_TMDQU2
DQU2 VSSQ_4
E2 C2 E2
B_TMDQU3
DQU3 VSSQ_5
E8 B_TMDQU4 A7 E8
DQU4 VSSQ_6
F9 A2 F9
B_TMDQU5
DQU5 VSSQ_7
G1 B8 G1
B_TMDQU6
DQU6 VSSQ_8
G9 A3 G9
B_TMDQU7
DQU7 VSSQ_9
+1.5V_DDR_S
R1007 22
AB_TMCK B_MCK
R1026
R1008 22 1K
AB_TMCKB
1%
B_MCKB
R1009 22
AB_TMCSB1
B_TMCSB1 AB_TMRESETB
R1010 22
AB_TMCSB0
A_TMCSB0
R1024 0
AB_TMCKE A_TMCKE
A_TMCKE
OPT
R1025 22
A_TMCKE R1027 C1142 C1143 C1144
B_MCKE 1K 0.01uF 0.01uF 0.01uF
50V 50V
1% 50V
IC100
MST9U03V4
AN20 AM6
AB_TMA0 CD_TMA0
A_A[0] B_A[0]
AR17 AM3
AB_TMA1 CD_TMA1
A_A[1] B_A[1]
AM20 AN4
AB_TMA2 CD_TMA2
A_A[2] B_A[2]
AP19 AL6
AB_TMA3 CD_TMA3
A_A[3] B_A[3]
AM2
AB_TMA4 AT16 CD_TMA4
A_A[4] B_A[4]
AN21 AN5
AB_TMA5 CD_TMA5
A_A[5] B_A[5]
AU17 AN1
AB_TMA6 CD_TMA6
A_A[6] B_A[6]
AR19 AP3
AB_TMA7 CD_TMA7
A_A[7] B_A[7]
AR18 AN3
AB_TMA8 CD_TMA8
A_A[8] B_A[8]
AR2
AB_TMA9 AT19 CD_TMA9
A_A[9] B_A[9]
AT15 AL2
AB_TMA10 B_A[10] CD_TMA10
A_A[10]
AT17 AN2
AB_TMA11 CD_TMA11
A_A[11] B_A[11]
AM18 AL5
AB_TMA12 CD_TMA12
A_A[12] B_A[12]
AR20 AR3
AB_TMA13 CD_TMA13
A_A[13] B_A[13]
AT18 AP2
AB_TMA14 CD_TMA14
A_A[14] B_A[14]
AB_TMA15 AM17 AK5 CD_TMA15
B_A[15]
A_A[15]
AM19 AM4
AB_TMBA0 CD_TMBA0
A_BA[0] B_BA[0]
AR16 AL3
AB_TMBA1 CD_TMBA1
A_BA[1] B_BA[1]
AN19 AM5
AB_TMBA2 CD_TMBA2
A_BA[2] B_BA[2]
AB_TMODT AN16 AH6 CD_TMRASB
A_ODT B_RASZ
AP16 AJ6
AB_TMRASB CD_TMCASB
A_RASZ B_CASZ
AN18 AK6
AB_TMWEB CD_TMWEB
A_WEZ B_WEZ
AN17 AJ5
AB_TMCASB CD_TMODT
A_CASZ B_ODT
AR15 AK3
AB_TMCKE CD_TMCKE
A_CKE B_CKE
AB_TMRESETB AU20 AT3 CD_TMRESETB
A_RST B_RST
AU14 AK1
AB_TMCK CD_TMCK
A_MCLK B_MCLK
AT14 AK2
AB_TMCKB CD_TMCKB
A_MCLKZ B_MCLKZ
AT20 AT2
AB_TMCSB0 CD_TMCSB0
A_CSB[0] B_CSB[0]
AU21 AU3
AB_TMCSB1 CD_TMCSB1
A_CSB[1] B_CSB[1]
AR11 AF3
A_TMDQL0 C_TMDQL0
A_DQ[0] B_DQ[0]
AT12 AH2
A_TMDQL1 C_TMDQL1
A_DQ[1] B_DQ[1]
AT10 AF2
A_TMDQL2 C_TMDQL2
A_DQ[2] B_DQ[2]
AR13 AH3
A_TMDQL3 C_TMDQL3
A_DQ[3] B_DQ[3]
AE2
A_TMDQL4 AT9 C_TMDQL4
A_DQ[4] B_DQ[4]
AR14 AJ3
A_TMDQL5 C_TMDQL5
A_DQ[5] B_DQ[5]
AR10 AE3
A_TMDQL6 C_TMDQL6
A_DQ[6] B_DQ[6]
AT13 AJ2
A_TMDQL7 C_TMDQL7 DDR3_B
A_DQ[7] B_DQ[7]
AR12 AG3
A_TMDML C_TMDML
A_DQM[0] B_DQM[0]
AG1
A_TMDQSL AU11 C_TMDQSL
A_DQS[0] B_DQS[0]
AT11 AG2
A_TMDQSLB B_DQSB[0] C_TMDQSLB
A_DQSB[0]
AN15 AG6
A_TMDQU0 C_TMDQU0
A_DQ[8] B_DQ[8]
AM12 AE5
A_TMDQU1 C_TMDQU1
A_DQ[9] B_DQ[9]
AM16 AJ4
A_TMDQU2 B_DQ[10] C_TMDQU2
A_DQ[10]
AN12 AD6
A_TMDQU3 C_TMDQU3
A_DQ[11] B_DQ[11]
AM14 AG5
A_TMDQU4 C_TMDQU4
A_DQ[12] B_DQ[12]
AM11 AD5
A_TMDQU5 C_TMDQU5
A_DQ[13] B_DQ[13]
AM15 AH5
A_TMDQU6 C_TMDQU6
A_DQ[14] B_DQ[14]
A_TMDQU7 AM13 AF4 C_TMDQU7
A_DQ[15] B_DQ[15]
AN13 AF5
A_TMDMU C_TMDMU
A_DQM[1] B_DQM[1]
AP13 AE6
A_TMDQSU C_TMDQSU
A_DQS[1] B_DQS[1]
AN14 AF6
A_TMDQSUB C_TMDQSUB
A_DQSB[1] B_DQSB[1]
AR6 AA3
B_TMDQL0 D_TMDQL0
A_DQ[16] B_DQ[16]
AR8 AC3
B_TMDQL1 D_TMDQL1
A_DQ[17] B_DQ[17]
AT5 AA2
B_TMDQL2 D_TMDQL2
A_DQ[18] B_DQ[18]
AU8 AD1
B_TMDQL3 D_TMDQL3
A_DQ[19] B_DQ[19]
B_TMDQL4 AR5 Y3 D_TMDQL4
A_DQ[20] B_DQ[20]
AR9 AD3
B_TMDQL5 D_TMDQL5
A_DQ[21] B_DQ[21]
AU5 AA1
B_TMDQL6 D_TMDQL6
A_DQ[22] B_DQ[22]
AT8 AD2
B_TMDQL7 D_TMDQL7
A_DQ[23] B_DQ[23]
AT7 AC2
B_TMDML D_TMDML
A_DQM[2] B_DQM[2]
AB2
B_TMDQSL AT6 D_TMDQSL
A_DQS[2] B_DQS[2]
AR7 AB3
B_TMDQSLB D_TMDQSLB
A_DQSB[2] B_DQSB[2]
AM10 AC4
B_TMDQU0 D_TMDQU0
A_DQ[24] B_DQ[24]
W6
B_TMDQU1 AP7 D_TMDQU1
A_DQ[25] B_DQ[25]
AN11 AC6
B_TMDQU2 B_DQ[26] D_TMDQU2
A_DQ[26]
AP6 Y4
B_TMDQU3 D_TMDQU3
A_DQ[27] B_DQ[27]
AN10 AC5
B_TMDQU4 D_TMDQU4
A_DQ[28] B_DQ[28]
AN7 Y5
B_TMDQU5 D_TMDQU5
A_DQ[29] B_DQ[29]
AP10 AB6
B_TMDQU6 D_TMDQU6
A_DQ[30] B_DQ[30]
AN8 Y6
B_TMDQU7 B_DQ[31] D_TMDQU7
A_DQ[31]
AN9 AA6
B_TMDMU D_TMDMU
A_DQM[3] B_DQM[3]
AM8 AA5
B_TMDQSU D_TMDQSU
A_DQS[3] B_DQS[3]
AM9 AB5
B_TMDQSUB D_TMDQSUB
A_DQSB[3] B_DQSB[3]
K33
NC_1
K35
NC_2
K32
NC_3
L34
NC_4
L36
NC_5
J33
NC_6
K37
NC_7
J32
NC_8
J35
NC_9
H32
NC_10
M36
NC_11
K36
NC_12
M32
NC_13
H33
NC_14
J36
NC_15
N32
NC_16
L32
NC_17
L35
NC_18
L33
NC_19
P33
NC_20
P34
NC_21
M33
NC_22
N33
NC_23
M35
NC_24
H34
NC_25
N37
NC_26
N36
NC_27
H35
NC_28
H37
NC_29
T35
NC_30
R36
NC_31
U36
NC_32
P35
NC_33
V36
NC_34
N35
NC_35
U35
NC_36
P36
NC_37
R35
NC_38
T37
NC_39
T36
NC_40
R33
NC_41
V32
NC_42
P32
NC_43
V33
NC_44
T32
NC_45
W32
NC_46
R32
NC_47
U32
NC_48
U33
NC_49
U34
NC_50
T33
NC_51
AA35
NC_52
W35
NC_53
AB36
NC_54
W37
NC_55
AB35
NC_56
V35
NC_57
AB37
NC_58
W36
NC_59
Y36
NC_60
AA36
NC_61
Y35
NC_62
Y32
NC_63
AC34
NC_64
W33
NC_65
AC32
NC_66
Y33
NC_67
AC33
NC_68
Y34
NC_69
AB33
NC_70
AA33
NC_71
AB32
NC_72
AA32
NC_73
IC1005
NT5CB64M16GP-FL NT5CB64M16GP-FL
DDR_CD_VREF
DDR3 SDRAM
N3 M8 N3
CD_TMA0 CD_TMA0
A0 VREFCA A0
CD_TMA1 P7 CD_TMA1 P7
A1 A1
P3 P3
CD_TMA2 CD_TMA2
A2 A2
N2 H1 N2
CD_TMA3 CD_TMA3
A3 VREFDQ A3
P8 P8
CD_TMA4 CD_TMA4
A4 A4
P2 R1045 P2
CD_TMA5 240 CD_TMA5
A5 A5
L8 1%
CD_TMA6 R8 CD_TMA6 R8
A6 ZQ A6
R2 R2
CD_TMA7 CD_TMA7
A7 A7
T8 T8
CD_TMA8 CD_TMA8
A8 A8
R3 B2 R3
CD_TMA9 CD_TMA9
A9 VDD_1 A9
L7 D9 L7
CD_TMA10 CD_TMA10
A10/AP VDD_2 A10/AP
R7 G7 R7
CD_TMA11 CD_TMA11
A11 VDD_3 A11
CD_TMA12 N7 K2 CD_TMA12 N7
A12/BC VDD_4 A12/BC
T3 K8 T3
CD_TMA13 CD_TMA13
NC_6 VDD_5 NC_6
N1
VDD_6 +1.5V_DDR_S
M7 N9 M7
CD_TMA15 CD_TMA15
NC_5 VDD_7 NC_5
R1
VDD_8
CD_TMBA0 M2 R9 CD_TMBA0 M2
BA0 VDD_9 BA0
N8 N8
CD_TMBA1 CD_TMBA1
BA1 BA1
M3 M3
CD_TMBA2 CD_TMBA2
BA2 BA2
A1
VDDQ_1
J7 A8 J7
CD_TMCK D_MCK
CK VDDQ_2 CK
CD_TMCKB K7 C1 D_MCKB K7
CK VDDQ_3 CK
K9 C9 K9
C_TMCKE D_MCKE
CKE VDDQ_4 CKE
D2
VDDQ_5
L2 E9 L2
C_TMCSB0 D_TMCSB1
CS VDDQ_6 CS
K1 F1 K1
CD_TMODT CD_TMODT
ODT VDDQ_7 ODT
CD_TMRASB J3 H2 CD_TMRASB J3
RAS VDDQ_8 RAS
K3 H9 K3
CD_TMCASB CD_TMCASB
CAS VDDQ_9 CAS
L3 L3
CD_TMWEB CD_TMWEB
WE WE
J1
NC_1
T2 J9 T2
CD_TMRESETB CD_TMRESETB
RESET NC_2 RESET
L1
NC_3
L9
NC_4
F3 T7 F3
C_TMDQSL CD_TMA14 D_TMDQSL
DQSL NC_7 DQSL
G3 G3
C_TMDQSLB D_TMDQSLB
DQSL DQSL
C_TMDQSU C7 A9 D_TMDQSU C7
DQSU VSS_1 DQSU
B7 B3 B7
C_TMDQSUB D_TMDQSUB
DQSU VSS_2 DQSU
E1
VSS_3
E7 G8 E7
C_TMDML D_TMDML
DML VSS_4 DML
D3 J2 D3
C_TMDMU D_TMDMU
DMU VSS_5 DMU
J8
VSS_6
E3 M1 D_TMDQL0 E3
C_TMDQL0
DQL0 VSS_7 DQL0
F7 M9 F7
C_TMDQL1 D_TMDQL1
DQL1 VSS_8 DQL1
F2 P1 F2
C_TMDQL2 D_TMDQL2
DQL2 VSS_9 DQL2
F8 P9 F8
C_TMDQL3 D_TMDQL3
DQL3 VSS_10 DQL3
H3 T1 H3
C_TMDQL4 D_TMDQL4
DQL4 VSS_11 DQL4
C_TMDQL5 H8 T9 D_TMDQL5 H8
VSS_12
DQL5 DQL5
G2 G2
C_TMDQL6 D_TMDQL6
DQL6 DQL6
H7 H7
C_TMDQL7 D_TMDQL7
DQL7 DQL7
B1
VSSQ_1
D7 B9 D7
C_TMDQU0 D_TMDQU0
DQU0 VSSQ_2 DQU0
C_TMDQU1 C3 D1 D_TMDQU1 C3
DQU1 VSSQ_3 DQU1
C8 D8 C8
C_TMDQU2 D_TMDQU2
DQU2 VSSQ_4 DQU2
C2 E2 C2
C_TMDQU3 D_TMDQU3
DQU3 VSSQ_5 DQU3
A7 E8 A7
C_TMDQU4 D_TMDQU4
DQU4 VSSQ_6 DQU4
A2 F9 A2
C_TMDQU5 D_TMDQU5
DQU5 VSSQ_7 DQU5
C_TMDQU6 B8 G1 D_TMDQU6 B8
DQU6 VSSQ_8 DQU6
A3 G9 A3
C_TMDQU7 D_TMDQU7
DQU7 VSSQ_9 DQU7
+1.5V_DDR_S
C1062
C1066 C1068 C1072 C1078 C1080 C1084 C1090 C1092 C1096
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF CD_TMCK
16V 16V 16V 16V 16V 16V 16V 16V 16V
10V
CD_TMCKB
CD_TMCSB1
+1.5V_DDR_S
CD_TMCSB0
CD_TMCKE
C1063
C1067 C1069 C1073 C1079 C1081 C1085 C1091 C1093 C1097 C_TMCKE
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16V 16V 16V 16V 16V 16V 16V 16V 16V
10V
+1.5V_DDR_S DDR_CD_VREF
R1057
1K
1%
R1058 C1102 C1104
IC1007 1K 0.1uF 1000pF
16V
1% 50V
DDR_CD_VREF
VTT_0.75V
DDR3 SDRAM
M8
VREFCA
H1
VREFDQ
R1055
240
L8 1%
ZQ
C1124
R1068
0.1uF
100
16V
CD_TMA10
B2 R1069 C1125
0.1uF
VDD_1 CD_TMA9 100
D9 16V
VDD_2 R1070
G7
CD_TMA13 100 C1126
VDD_3 0.1uF
K2 16V
AR1010
VDD_4
K8 100 C1127
VDD_5 CD_TMA14 0.1uF
N1 16V
VDD_6 +1.5V_DDR_S CD_TMA8
N9
VDD_7
R1 CD_TMA11
VDD_8
CD_TMA6
R9
VDD_9
AR1011
100
CD_TMA1
A1
VDDQ_1
A8 CD_TMA4
VDDQ_2
CD_TMA12
C1
VDDQ_3
CD_TMBA1
C9 C1128
VDDQ_4 0.1uF
D2 16V
AR1012
VDDQ_5
E9 100
C1129
VDDQ_6 0.1uF
F1 CD_TMA7
16V
VDDQ_7
CD_TMA2
H2 C1130
VDDQ_8
CD_TMA5 0.1uF
H9 16V
VDDQ_9 CD_TMA0
C1131
0.1uF
J1
AR1013 16V
NC_1
J9 100
C1132
NC_2 0.1uF
CD_TMA3
L1 16V
NC_3
CD_TMBA2
L9 C1133
0.1uF
NC_4 CD_TMBA0
T7 16V
CD_TMA14
NC_7 CD_TMA15
C1134
0.1uF
16V
AR1014
100
A9 C1135
VSS_1 0.1uF
CD_TMWEB
B3 16V
VSS_2 CD_TMCASB
E1 C1136
VSS_3 CD_TMRASB 0.1uF
G8
16V
VSS_4
J2 CD_TMODT C1137
VSS_5 0.1uF
J8
16V
VSS_6 OPT
M1 R1071 C1138
100 0.1uF
VSS_7 D_MCKE
M9 16V
R1072
VSS_8
P1 56
D_MCK C1139
VSS_9 0.1uF
P9 R1073
16V
VSS_10 56
T1 D_MCKB
OPT C1140
VSS_11 0.1uF
R1074
T9 CD_TMRESETB 16V
VSS_12 100
C1141
0.1uF
16V
B1
VSSQ_1
B9
VSSQ_2
D1
VSSQ_3
D8
VSSQ_4
E2
VSSQ_5
E8
VSSQ_6
F9
VSSQ_7
G1
VSSQ_8
G9
VSSQ_9
+1.5V_DDR_S
R1053
1K
R1043 22
D_MCK 1%
R1044 22
CD_TMRESETB
D_MCKB
R1047 22
D_TMCSB1
R1048 22 C_TMCKE
C_TMCSB0 OPT
R1049 0 R1054 C1146 C1148 C1150
0.01uF 0.01uF 0.01uF
1K
C_TMCKE 50V 50V 50V
R1050 22 1%
D_MCKE
2018.01.16
32UK950
DDR 3 13