Serial pic microcontroller programmer extensor (2 pages)
Summary of Contents for Steren HOT-557
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HOT-557 Layout-Version 1.5 Pentium processor ™ Based PCI MAIN BOARD User's Manual User's Manual 1...
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FCC Notice: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
A type 7 Pentium processor socket provides access to future processor enhancements. HOT-557 provides a new level of I/O integration. Intel's 82430VX PCIset chipset provides increased integration and improved performance over other chipset designs. The 82430VX PCIset chipset provides an integrated Bus Mastering IDE controller with two high performance IDE interfaces for up to four IDE devices.
Introduction Chapter Specification CPU Function Pentium processors : 75~200MHz Cyrix/IBM 6x86/L processors : P120+~P166+ AMD K5 processors : PR75~PR166 Chipset Intel PCIset 82437VX, 82438VX and 82371SB Memory Supports two banks of EDO, Fast Page Mode DRAM or 3.3V Sync. DRAM ranging from 8MB to 128MB Supports 4MB, 8MB, 16MB, 32MB 72-pins SIMMs or 8MB, 16MB, 32MB 168-pin DIMMs Cache Memory...
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Expansions 32-bit PCI bus slot x 4 16-bit ISA bus slot x 3 2-channel PCI IDE port - Support up to 4 IDE devices - PIO Mode 4, DMA Mode 2 transfers up to 22 MB/sec - Integrated 8 x 32-bit buffer for PCI IDE burst transfers One floppy port One parallel port - Supports SPP (PS/2 compatible bidirectional Parallel...
JP36 is a 6-pin jumper that determine the system clock frequency from 50 MHz to 66 MHz. HOT-557 mainboard also provides Jumpers JP23 and JP24 to figure the CPU core clock multiplier. By inserting or removing jumper caps on JP23 and JP24, the user can change the Host Bus Clock/CPU Core Clock ratio from 1 : 1.5 to 1 : 3.
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AMD K5 Processor System Clock Clock Multiplier CPU Type (JP36) (JP23, JP24) PR200 66 MHz (133 MHz) PR166 66 MHz 1,75 x (116,7 MHz) PR150 60 MHz 1,75 x (105 MHz) PR133 66 MHz 1,5 x (100 MHz) PR120 60 MHz 1,5 x (90 MHz) PR100...
Onboard Regulator Output- J100, J101, J102, J107 HOT-557 mainboard is designed with dual onboard voltage regulator to provide single 3.3V voltage (V ) for Intel Pentium P54C, 3.5V for CORE Cyrix/IBM 6x86 and AMD K5 processors, and also provide dual 3.3/2.8V...
Pipeline Burst Type Cache Size Selection - JP29, JP30 HOT-557 mainboard supports 256KB or 512KB pipeline burst cache. If the HOT-557 is ordered with no cache installed, the cache can be field upgraded by installing a primary 256KB pipeline burst cache module into the CELP socket.
Flash EPROM Jumper - JP19 HOT-557 mainboard supports two types of flash EPROM, 5 volt and 12 volt. By setting up jumper JP19, you can update both types of flash EPROM with new system BIOS files as they come available.
CPU is in use) Display Mode Jumper - JP7 Factory Reserved Jumpers - JP39, JP43, JP44 On the HOT-557 mainboard remain three jumpers for future use. Normally, those jumpes were defualt by the manafacturer and need not to change by the user.
Memory Configuration Chapter The HOT-557 mainboard provides four 72-pin SIMM sockets and two 168- pin DIMM sockets that make it possible to install up to 128MB of RAM. The SIMM socket support 4MB, 8MB, 16MB, and 32MB 5V single- or double-side fast page or EDO DRAM modules, and DIMM socket support 8MB, 16MB, .
Award BIOS Setup Chapter HOT-557 BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed RAM so that it retains the Setup information when the power is turned off.
The Main Menu Standard CMOS setup This setup page includes all the items in a standard compatible BIOS. BIOS features setup This setup page includes all the items of Award special enhanced features. Chipset features setup This setup page includes all the items of chipset features. Power Management Setup This setup page includes all the items of Power Management features.
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Load Setup Defaults Setup defaults loads the values required by the system for the O.K. performance. However, you may change the parameter through each Setup Menu. Integrated Peripherals This setup page includes all the items of peripheral features. IDE HDD auto detection Automatically configure IDE hard disk drive parameters.
Standard CMOS Setup Date The date format is <day>, <month> <date> <year>. Press <F3> to show the calendar. Time The time format is <hour> <minute> <second>. The time is calculated base on the 24-hour military-time clock. For example. 5 p.m. is 17:00:00. Drive C type/Drive D type This item identify the types of hard disk drive C and drive D that has been installed in the computer.
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The user may also set those items to AUTO to auto configure hard disk drives parameter when system power-on. If a hard disk drive has not been installed select NONE and press <Enter>. Drive A type/Drive B type This item specifies the types of floppy disk drive A or drive B that has been installed in the system.
BIOS Features Setup CPU Internal Cache This item enables CPU internal cache to speed up memory access. External Cache This item enables the external cache to speed up memory access. Quick Power On Self Test This item speeds up Power On Self Test (POST) after you power on the computer.
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Boot Up NumLock Status When this option enables, BIOS turns on Num Lock when system is powered on so the end user can use the arrow keys on both the numeric keypad and the keyboard. Boot Up System Speed This option sets the speed of the CPU at system boot time. The settings are High or Low.
Chipset Features Setup Auto Configuration This item auto configure the following items: DRAM RAS# Precharge time, DRAM R/W Leadoff Timing, Fast RAS to CAS Delay, DRAM Read Burst, DRAM Write Burst Timing, Fast MA to RAS# Delay CLK, Fast EDO Path Select, Refresh RAS# Assertion, and ISA Bus Clock by different system clock.
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7/6 : Seven clocks leadoff for reads and six clocks leadoff for writes. 6/5 : Six clocks leadoff for reads and five clocks leadoff for writes. Fast RAS To CAS Delay When DRAM is refreshed, both rows and columns are address separately. This setup item allows you to determine the timing of the transition from Row Address Strobe (RAS) to Column Address Strobe (CAS).
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System BIOS Cacheable This item allows the user to set whether the system BIOS F000~FFFF areas are cacheable or non-cacheable. Video BIOS Cacheable This item allows the user to set whether the video BIOS C000~C7FF areas are cacheable or non-cacheable. 8 Bit I/O Recovery Time The recovery time is the length of time, measured in CPU clocks, which the system will delay after the completion of an input/output request.
Power Management Setup Power Management This item determines the options of the power management function. Default value is Disable. The following pages tell you the options of each item & describe the meanings of each options. Disabled Global Power Management will be disabled. User Define Users can configure their own power management.
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This function is enabled for only the VGA card supporting DPM. Doze Mode Defines the continuous idle time before the sys- 1 Min~1 Hr tem enters DOZE mode. Disable System will never enter DOZE mode. Standby Mode Defines the continues idle time before the sys- 1 Min~1 Hr tem enters STANDBY mode.
PCI Configuration Setup Resources Controlled By The Award Plug and Play BIOS has the capability to automatically configure all of the boot and Plug and Play compatible devices. However, this capability means absolutely nothing unless you are using a Plug and Play operating system as Windows 95.
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PCI IRQ Activated by This items sets the method by which the PCI bus recognize that an IRQ service is being requested by a device. Under all circumstances, you should not change the default configuration unless advised otherwise by your system's manufacturer.
Integrated Peripherals IDE HDD Block Mode This item is used to set IDE HDD Block Mode. If your IDE Hard Disk supports block mode, then you can enable this function to speed up the HDD access time. If not, please disable this function to avoid HDD access error.
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Onboard FDC Control This item specifies onboard floppy disk drive controller. This setting allows you to connect your floppy disk drives to the onboard floppy connector. Choose the "Disabled" settings if you have a separate control card. Onboard UART1/2 This item is used to define onboard serial port 1/Port2 to 3F8/IRQ4 , 2F8/ IRQ3, 3E8/IRQ4 , 2E8/IRQ3 , Auto or Disabled .
Password Setting This section describes the two access modes that can be set using the options found on the Supervisor Password and User Password. Supervisor Password and User Password The options on the Password screen menu make it possible to restrict access to the Setup program by enabling you to set passwords for two different access modes: Supervisor mode and User mode.
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Password Disable If you select System at Security Option of BIOS Features Setup Menu, you will be prompted for the password every time the system is rebooted or any time you try to enter Setup. If you select Setup at Security Option of BIOS Features Setup Menu, you will be prompted only when you try to enter Setup.
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