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RX-8022PSL
Description of major ICs
XCC56367PV150 (IC501) : DSP
1. Pin layout
SDO2/SDI3/SDO2_1/SDI3_1
SDO3/SDI2/SDO3_1/SDI2_1
2. Block diagram
1
DAX
TRIPLE
(SPDIF Tx.)
TIMER
INTERFACE
ADDRESS
GENERATION
UNIT
SIX CHANNELS
DMA UNIT
INTERNAL
DATA
BUS
PLL
CLOCK
GENARAT
EXTAL
RESET
PINIT/NMI
1-12
SCK/SCL
1
SS#/HA2
2
HREQ#
3
SDO0/SDO0_1
4
SDO1/SDO1_1
5
6
7
VCCS
8
GNDS
9
SDO4/SDI1
10
SDO5/SDI0
11
FST
12
FSR
13
SCKT
14
SCKR
15
HCKT
16
HCKR
17
VCCQL
18
GNDQ
19
VCCQH
20
21
HDS/HWR
HRW/HRD
22
HACK/HRRQ
23
24
HOREQ/HTRQ
VCCS
25
GNDS
26
27
ADO
ACI
28
TIO0
29
HCS/HA10
30
HA9/HA2
31
HA8/HA1
32
HAS/HA0
33
HAD7
34
HAD6
35
HAD5
36
2
16
8
4
6
HOST
ESAI
INTERFACE
INTERFACE
ESAI_1
PERIPHERAL
EXPANSION AREA
PIO_EB
24-BIT
DSP56300
Core
PROGRAM
PROGRAM
INTERRUPT
DECODE
CONTROLLER
CONTROLLE
MODA/IRQA
MODB/IRQB
MODC/IRQC
MODD/IRQD
5
MENORY EXPANTION AREA
PROGRAM
SHI
RAM
X MEMORY
INTERFACE
/INSTR.
RAM
CACHE
13K x 24
3Kx24
PROGRAM
ROM
ROM
32K x 24
40K x 24
Bootstrap
PM_EB
YAB
XAB
PAB
DAB
DDB
YDB
XDB
PDB
GDB
DATA ALU
PROGRAM
24 x 24 + 56->56-BIT MAC
ADDRESS
TWO 56-BIT ACCUMULATORS
GENERATOR
BARREL SHIFTER
24BITS BUS
108
D6
107
D5
D4
106
105
D3
104
GNDD
VCCD
103
102
D2
101
D1
D0
100
99
A17
98
A16
97
A15
96
GNDA
95
VCCQH
94
A14
93
A13
92
A12
91
VCCQL
90
GNDQ
89
A11
88
A10
87
GNDA
86
VCCA
85
A9
84
A8
83
A7
82
A6
81
GNDA
80
VCCA
79
A5
A4
78
77
A3
76
A2
GNDA
75
74
VCCA
73
A1
Y MEMORY
RAM
7K x 24
ROM
8K x 24
XM_EB
YM_EB
EXTERNAL
18
ADDRESS
BUS
ADDRESS
SWITCH
DRAM &
SRAM BUS
10
INTERFACE
&
CONTROL
I-CACHE
24
EXTERNAL
DATA BUS
SWITCH
DATA
POWER
MNGMNT
4
JTAG
OnCE
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