Progressive Block Diagram - Hitachi DV-P725U Service Manual

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Progressive Block Diagram

CN1801
3-10
YC(0-7)
13
SDA
FROM/TO
14
SCL
VIDEO BLOCK
1
CLK27MHz
DIAGRAM CN702
16
H SYNC
17
FID
15
/FERS
IC1806
1
2
IC1807
1
2
4-2-5
IC1801
(DE-INTERLACER)
20
FORMATTER
DE-INTERLACER
27
40
PLL/CLOCK GENE
3
4
~
~
49 47 48
125
136
139 176
(F/F)
F
3
F
(AND GATE)
4
~
~
~
~
20 24
27 32
2
12
39 49
RAM
IC1808
IC1809
DATA(VIDEO) SIGNAL
IC1803
65
2
72
75
11
76
FORMATTER
93
42
94
97
51
104
H SYNC
92
29
SYNC
V SYNC
91
28
GENERATOR
CLOCK
117
25
40
RESET
31
SDA
30
SCL
~
~
~
~
20 24
27 32
2
12
39 49
RAM
PROGRESSIVE
/INTERLACE
SW1801
+5V
PROGRESSIVE CBA
VIDEO SIGNAL
(PROGRESSIVE ENCODER)
TEST PATT.GENE.
/DELAY
/GAMMA CORRECTOR
4:2:2
4:2:2
TO
TO
4:4:4
4:4:4
X2
INTER-
POLATION
DAC
DAC
DAC
32
34
36
IC1802
(DRIVE)
4
6dB
DR
13
12
7
6dB
DR
10
10
9
2
6dB
DR
15
15
14
MUTE
1
CN1802
2 VIDEO-Y
TO VIDEO
4 VIDEO-U
BLOCK
6 VIDEO-V
DIAGRAM
12 I/P SW
CN1602

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