7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Supply
7.3 SSB Power Management
7.4 Circuit Description
7.5 Front-End Analogue and reception
7.6 HDMI
7.7 Video and Audio Processing - MT5301B
Notes:
•
Only new circuits (circuits that are not published recently)
are described.
•
Figures can deviate slightly from the actual situation, due
to different set executions.
•
For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block
Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB
a separate drawing for clarification is shown.
7.1
Introduction
The TPM8.31A LA is a new chassis based on the earlier
TPM8.3A LA chassis. The whole range is covered by
MT5301BCMU/B LQFP-256, main IC. The so-called MT5301B
platform. These TVs all support video with a resolution of
1920 × 1080 on their full-HD panels.
7.1.1
Implementation
Key components of this chassis are:
•
MT5301B System-On-Chip (SOC) TV Processor
•
F86WT-17-E Tuner (analogue)
•
STA515W13TR Head Phone amplifier
•
STA339BWTR audio amplifier
7.1.2
TPM8.31A Architecture Overview
For details about the chassis block diagrams refer
to
Figure
9.4.
Circuit Descriptions
Layouts).Where necessary,
back to
div. table
TPM8.31A LA
7.
EN 25
2012-Jun-08