Opal Kelly XEM6010 User Manual
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Opal Kelly XEM6010 User Manual

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Opal Kelly
XEM6010 User's Manual
A compact (75mm x 50mm) integration board featuring
the Xilinx Spartan-6 FPGA, High-Speed USB 2.0, and
on-board DDR2 memory.
The XEM6010 is a compact USB 2.0 FPGA integration module featuring the Xilinx Spartan-6 FPGA, 1
Gb (64 Mx16-bit) DDR2 SDRAM, high-efficiency switching power supplies, and two high-density 0.8-mm
expansion connectors. The high-speed USB 2.0 interface provides fast configuration downloads and
PC-FPGA communication as well as easy access with our popular FrontPanel application and SDK. A
flexible, multiple-output PLL is also provided on-board..

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Summary of Contents for Opal Kelly XEM6010

  • Page 1 Xilinx Spartan-6 FPGA, High-Speed USB 2.0, and on-board DDR2 memory. The XEM6010 is a compact USB 2.0 FPGA integration module featuring the Xilinx Spartan-6 FPGA, 1 Gb (64 Mx16-bit) DDR2 SDRAM, high-efficiency switching power supplies, and two high-density 0.8-mm expansion connectors.
  • Page 2 All rights reserved. Unauthorized duplication, in whole or part, of this document by any means except for brief excerpts in published reviews is prohibited without the express written permission of Opal Kelly Incorporated. Opal Kelly, the Opal Kelly Logo, and FrontPanel are trademarks of Opal Kelly Incorporated.

  • Page 3: Table Of Contents

    Applying the XEM6010 ......9 Powering the XEM6010 ......9 Power Budget .
  • Page 4 BRK6110 Mechanical Drawing ....21 XEM6010 Quick Reference ..... 22 XEM6010 Quick Reference .

  • Page 5: Introducing The Xem6010

    PCB Footprint A mechanical drawing of the XEM6010 is shown at the end of this manual. The PCB is 75mm x 50mm with four mounting holes (M2 metric screws) spaced as shown in the figure. These mounting holes are electrically isolated from all signals on the XEM6010.

  • Page 6: Functional Block Diagram

    Samtec Expansion Connector FPGA The XEM6010 is offered in two variants. These two variants are identical except for the FPGA provided. The table below lists some of the differences between the two devices. Please consult the Xilinx documentation for a more thorough comparison.

  • Page 7: Dc Power Connector

    XEM6010 User’s Manual DC Power Connector The DC power connector on the XEM6010 is part number PJ-102AH from CUI, Inc. It is a stan- dard “canon-style” 2.1mm / 5.5mm jack. The outer ring is connected to DGND. The center pin is connected to +VDC.

  • Page 8: Frontpanel Support

    PC-based virtual instruments such as LEDs, hex displays, pushbuttons, toggle buttons, and so on. Essentially, this makes your PC a reconfigu- rable I/O board and adds tremendous value to the XEM6010 as an experimentation or prototyp- ing system.

  • Page 9: Applying The Xem6010

    Applying the XEM6010 Powering the XEM6010 The XEM6010 requires that this supply be clean, filtered, and within the range of 4.5v to 5.5v. This supply must be delivered through the +VDC pins on the two device’s two expansion connec- tors or the DC power connector..

  • Page 10: Example Xem6010-Lx150 Fpga Power Consumption

    Available: 2,400 mW Supply Heat Dissipation (IMPORTANT!!) Due to the limited area available on the small form-factor of the XEM6010 and the density of logic provided, heat dissipation may be a concern. This depends entirely on the end application and cannot be predicted in advance by Opal Kelly.

  • Page 11: Host Interface

    FrontPanel installation for examples. MUXSEL MUXSEL is a signal on the XEM6010 which selects the signal path to the FPGA programming signals D0 and CCLK. When low (deasserted), the FPGA and USB microcontroller are connect- ed. When high (asserted), the FPGA and PROM are connected.

  • Page 12: Flashloader Sample

    FlashLoader sample loads the configuration file into the Flash. LEDs There are eight LEDs on the XEM6010. Each is wired directly to the FPGA according to the pin mapping tables at the end of this document.

  • Page 13: Clock Configuration (Source Synchronous)

    Spartan-6 has integrated memory control blocks to communicate with the external DDR2 mem- ory on the XEM6010. This is instantiated using the Xilinx Core Generator (memory interface generator, or MIG) to create a suitable memory controller for your design. You should read and become familiar with the DDR2 SDRAM datasheet as well as MIG and the core datasheet.

  • Page 14: Jtag

    The JTAG connections on the FPGA are wired directly to the expansion connector JP2 on the XEM6010 to facilitate FPGA configuration and ChipScope usage using a Xilinx JTAG cable. The BRK6110 has these signals connected to a 2-mm header compatible with the Xilinx JTAG cable.

  • Page 15: Setting I/O Voltages

    The Spartan-6 FPGA allows users to set I/O bank voltages in order to support several different I/O signalling standards. This functionality is supported by the XEM6010 by allowing the user to connect independent supplies to the FPGA VCCO pins on two of the FPGA banks.

  • Page 16: Brk6110 Breakout Board

    XEM6010 and a DC power connector (2.1mm/5.5mm, center positive) for pro- viding +VDC to the XEM6010. What follows is a detailed description of how the BRK6110 pins connect to the XEM6010. The description belies the simplicity of this interconnect. It should be pretty obvious just by looking at the traces on the BRK6110.

  • Page 17: Migrating From The Xem3010 To The Xem6010

    Each of these four has selectable I/O bank voltages. The Spartan-6 device on the XEM6010 only has four total I/O banks, two of which are routed to the expansion connectors. This is a consideration in designs where multiple I/O bank voltages were used.

  • Page 18: Migrating From The Xem3050 To The Xem6010

    Each of these four has selectable I/O bank voltages. The Spartan-6 device on the XEM6010 only has four total I/O banks, two of which are routed to the expansion connectors. This is a consideration in designs where multiple I/O bank voltages were used.
  • Page 19 XEM6010 User’s Manual www.opalkelly.com...

  • Page 20: Xem6010 Mechanical Drawing

    XEM6010 User’s Manual XEM6010 Mechanical Drawing 50.00 47.00 42.33 39.00 30.00 24.90 12.90 3.00 2.33 50.00 45.00 5.00 12.60 8.10 1.57 All dimensions in mm www.opalkelly.com...

  • Page 21: Brk6110 Mechanical Drawing

    XEM6010 User’s Manual BRK6110 Mechanical Drawing All dimensions in mm. 120.00 117.00 112.71 111.00 108.56 106.41 98.00 92.73 73.00 65.00 58.26 29.00 27.00 3.00 www.opalkelly.com...

  • Page 22: Xem6010 Quick Reference

    XEM6010 User’s Manual XEM6010 Quick Reference Length Length Host Interface FPGA Connection FPGA Pin (mm) Connection FPGA Pin (mm) DGND +3.3VDD HI_IN[0] +3.3VDD HI_IN[1] AB20 JTAG_TCK +3.3VDD HI_IN[2] JTAG_TMS JTAG_TDO HI_IN[3] JTAG_TDI VREF_1 Bank 1 VREF HI_IN[4] SYS_CLK4 HI_IN[5] DGND...

  • Page 23: Xem6010 Quick Reference

    XEM6010 User’s Manual XEM6010 Quick Reference Length Length Connection FPGA Pin (mm) Connection FPGA Pin (mm) +VDC DGND +VDC +1.2VDD +VDC +1.2VDD +1.8VDD SYS_CLK5 +3.3VDD USB_SCL +3.3VDD USB_SDA +3.3VDD DGND L60P_1 52.024 L74P_1 38.591 L60N_1 53.341 L74N_1 40.628 L70P_1 49.434 L72P_1 39.602...

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