6-Pin Interface Header - QRP Labs QLG2-SE Manual

3.5

6-pin interface header

At the center of the QLG2-SE board's bottom edge, is a 6-pin header that provides access
to the power supply rails, the GNSS outputs, and the Serial port of the USB to Serial
converter.
The 1pps, Serial data, TXD and RXD signals can be configured to be either 2.8V/3.3V logic
level, or 5V logic level. The configuration is done using jumper wires that will be described
in the next section. Note that 2.8V logic will be compatible with 3.3V systems, without issue.
From left to right:
Power supply ground.
•
1pps: 1 Pulse Per Second output from the GNSS module; by default this pulse is 0.1
•
seconds wide and it is sent once per second. By default, the voltage level is 5V
which is suitable for use with QRP Labs products such as QCX, Ultimate3S, VFO,
ProgRock and Clock kits.
TxD: The NMEA serial data output from the GNSS module. By default this is at 9600
•
baud and is 5V logic level, which is suitable for use with QRP Labs products such as
QCX, Ultimate3S, VFO and Clock kits. Note that this signal is connected to the "TxD"
signal of the 4-pin header on the right side of the board.
NC: This pin is not connected on QLG2-SE
•
RxD: Serial data input to the GNSS module. This RxD (receive) pin is tolerant of 2.8,
•
3.3 or 5V logic levels and QLG2-SE automatically converts this to 3.3V for the GNSS
module.
+5V: Power supply positive. It is nominally 5V, but in fact you could power the QLG2-
•
SE module from any positive supply voltage in the range 3.3V to 6.0V, and the
onboard voltage regulator will provide 3.3V to the GNSS module which is its correct
supply voltage.
NOTE that the 5V logic levels referenced above, assume a 5V supply voltage to the QLG2-
SE; if you use a different supply voltage in the range 3.3V to 6.0V then the "high" logic level
will be at that different supply voltage, not 5.0V.
QLG2-SE manual 1.00
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