Related Manuals for Eurotech EmbeddedDNA An0031
Summary of Contents for Eurotech EmbeddedDNA An0031
- Page 1 EmbeddedDNA ® An0031 PC/104 CPU Module CPU-1232; TFT Digital Interface Rev. 1.0 Sep. 2003 COPYRIGHT 1994-2003 Eurotech S.p.A. All Rights Reserved.
- Page 2 Eurotech S.p.A. reserves the right to change the contents and form of this document, as well as the features and specifications of its products at any time, without notice.
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Page 3: Conventions
Application Note Conventions The following table lists conventions used throughout this guide. Icon Notice Type Description Important features or Information note instructions Information to alert you to potential damage to a program, Warning system or device or potential personal injury... - Page 4 (This page is intentionally left blank.)
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Page 5: Table Of Contents
Table of Contents Conventions ..............................3 Table of Contents ............................5 Chapter 1 CPU-1232 TFT Digital Interface ....................7 TFT Digital Interface Overview ........................7 J19 TFT Digital Interface Connector ......................8 J19 TFT Digital Interface Pin Out........................9 J19 TFT Digital Interface Signal Description....................10 Chapter 2 BIOS Setup .......................... - Page 6 (This page is intentionally left blank.)
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Page 7: Chapter 1 Cpu-1232 Tft Digital Interface
Table 1. LCD-TFT video resolutions (*) (*)- This list is not meant to be a complete list of all the possible supported TFT video For further info about other/new LCD-TFT flat panels supported, please contact the Eurotech Customer Support Service. -
Page 8: J19 Tft Digital Interface Connector
Application Note J19 TFT Digital Interface Connector The TFT digital interface is accessible via the J19 connector, which is a 20x2 pitch 1.25mm SMT connector. NS Geode CS5530A Companion Geode Gx1 Process Figure 1. Connectors layout The following table shows the J19 connector type and its matching models: Connector Reference Connector Type J19 Used Connector... -
Page 9: J19 Tft Digital Interface Pin Out
Application Note J19 TFT Digital Interface Pin Out The following table describes the J19 TFT Digital Interface connector signals: Pin Number Function Pin Number Function Reserved GREEN5 (MSB) FP_HSYNC GREEN4 GREEN3 FP_VSYNC GREEN2 GREEN1 Data Enable GREEN0 (LSB) BLUE5 (MSB) RED5 (MSB) BLUE4 RED4... -
Page 10: J19 Tft Digital Interface Signal Description
Application Note J19 TFT Digital Interface Signal Description The digital TFT interface signals are described in the following table: SIGNAL NAME Description Electrical Characteristics Pixel Port Clock Dot Clock TTL 8mA V = 3.3V HMAX Dot Clock is the pixel dot clock output. It clocks the pixel data. Flat Panel Horizontal Sync Flat Panel Horizontal Sync establishes the line rate and TTL 8mA V... -
Page 11: Chapter 2 Bios Setup
Application Note Chapter 2 BIOS Setup To enable the TFT Digital Interface functionality, the user sbould properly configure the BIOS settings. This section will show which BIOS settings to modify to properly control the LCD-TFT. For further information on how to set the BIOS, please refer to the CPU-1232 user manual. CPU-1232 BIOS Menu After entering BIOS setup (pressing the “F2”... -
Page 12: Cpu-1232 Bios Flat Panel Parameters
Application Note CPU-1232 BIOS Flat Panel parameters This is a brief description of the fields that can be modified in the BIOS Setup their default value: Default Field Description Value Type Disabled Disabled Custom Custom parameters Hitachi 800x600 (38MHz) Disabled LG 800x600 (38MHz) NEC 800x600 (38MHz) Sharp 800x600 (40MHz) - Page 13 Application Note Table 6. Timing Characteristic Example for a TFT-LCD The following instructions are an example on how to define the values to enter in the Setup, relating to timing characteristics shown in Table 6.
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Page 14: Timings Diagrams
Application Note BIOS Field BIOS Value Notes Type Custom We would enter custom parameters Resolution 640x480 Obtained from the TFT-LCD datasheet, this is a characteristic. Referring Table 6 CLK (1/Tc) Typical value. The reported value Dot Clock (MHz) 25.175MHz is approximated to 25Mhz Referring Table 6 HSync Front Porch (thf) Typical value. - Page 15 Application Note Figure 4. Timing Diagram Vertical Mode The previous Figures may be useful to verify graphically if the entered BIOS parameters match the TFT timing diagram. Regarding the timing, the following relationships should be ensured: Horizontal Sync. : Period (th) = Display Period (thd) + Front Porch (thf) + Pulse Width (thp*) + Back Porch (thb*) Vertical Sync.
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Page 16: Chapter 3 Connecting The Tft-Lcd To The Cpu-1232
Application Note Chapter 3 Connecting the TFT-LCD to the CPU-1232 This section contains a brief checklist of the actions to perform before connecting a TFT–LCD display to the CPU-1232. First of all, download all information about the TFT-LCD module and its inverter selected; Verify that the resolution of the TFT panel is compatible with and supported by the resolution shown in Table 1 of this application note;...
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