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Pin No
Pin name
39
FDT6
40
FDT7
41
NCE
42
FADR10
43
NOE
44
MMOD
45
NRST
46
VSS
47
SCLOCk
48
SDATA
49
TxD/EXTRG0/MDATA
50
RxD/EXTRG1/MCLOCK
51
VDD3
52
OSCI
53
OSCO
54
VSS
55
DRV0
56
DRV1
57
DRV2
58
DRV3
59
DRV4
60
DRV5
61
DRV6
62
DRV7
63
VSS
64
DRV8
65
DRV9
66
DRV10
67
DRV11
68
DRV12
69
DRV13
70
DRV14
71
DRAMVSS
72
DRAMVDD15
73
DRAMVDD33
74
VDD3
75
FG
76
TX
I/O
Connect to
I/O
toFLASH
I/O
toFLASH
O
toFLASH
O
toFLASH
O
toFLASH
I
-
I
fromRSTIC
GND
-
I/O
-
I/O
-
I/O
-
I/O
-
Power
-
I
X'tal
O
X'tal
GND
-
I/O
toDRIVEIC
I/O
toDRIVEIC
I/O
toFEP
I/O
toFEP
I/O
I/O
I/O
I/O
GND
-
I/O
I/O
I/O
I/O
I/O
toFEP
I/O
toFEP
I/O
toFEP
GND
-
Power
-
power
-
Power
-
I
fromDRVIC
O
-
Description
FLASH data In/out
FLASH data In/out
FLASH chip reset signal out
FLASH address out
FLASH read signal out
Test mode change signal
Reset input
VSS
DWire data pin *1
DWire data pin *1
Serial send/DWire trigger pin *2
Serial receiver/DWire trigger pin *2
VDD (3.3V)
OSC input (16.9344MHz)
OSC output (16.9344MHz)
VSS
Traverse drive out/General port
Spindle drive output
Focus Balance ADJ output
Tracking balance ADJ output
General purpose port
General purpose port
General purpose port
General purpose port
VSS
General purpose port
General purpose port
General purpose port
General purpose port
FEP clock out
FEP data out
FEP enable signal
DRAM VSS
DRAM (1.5V)
DRAM (3.3V)
VDD (3.3V)
Monitor FG input
Digital out
39
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