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Datasheet
A S 3 9 9 0 / A S 3 9 9 1
U H F R F I D S i n g l e C h i p R e a d e r E P C C l a s s 1 G e n 2 C o m p a t i b l e
1 General Description
The AS3990/AS3991 UHF reader chip is an integrated analog front
end and protocol handling systems for a ISO18000-6C 900MHz
RFID reader system.
Equipped with built-in programming options, the device is suitable for
a wide range of UHF RFID applications. The AS3990/AS3991
includes improved on-board VCO and internal PA.
The reader configuration is achieved by selecting the desired
protocol in control registers. Direct access to all control registers
allows fine tuning of different reader parameters.
Parallel or serial interface can be selected for communication
between the host system (MCU) and the reader IC. When hardware
coders and decoders are used for transmission and reception, data
is transferred via 24 bytes FIFO register.
In case of direct transmission or reception, coders and decoders are
bypassed and the host system can service the analog front end in
real time.
The transmitter generates 20dBm output power into 50Ω load and is
capable of ASK or PR-ASK modulation. The integrated supply
voltage regulators ensure supply rejection of the complete reader
system.
The transmission system comprises low level data coding. Automatic
generation of FrameSync, Preamble, and CRC is supported.
The receiver system allows AM and PM demodulation. The receiver
also comprises automatic gain control option (patent pending) and
selectable gain and signal bandwidth to cover a range of input link
frequency and bit rate options.
The signal strength of AM and PM modulation is measured and can
be accessed in RSSI register.
The receiver output is selectable between digitized sub-carrier signal
and any of integrated sub-carrier decoders. Selected decoders
deliver bit stream and data clock as outputs.
The receiver system also comprises framing system. This system
performs the CRC check and organizes the data in bytes. Framed
data is accessible to the host system through a 24 byte FIFO
register.
To support external MCU and other circuitry a 3.3V regulated supply
and clock outputs are available. The regulated supply has 20mA
current capability.
The AS3990/AS3991 is available in a 64-pin QFN (9mm x 9mm),
ensuring the smallest possible footprint.
www.austriamicrosystems.com/AS3990
www.austriamicrosystems.com/AS3991
2 Key Features
Filters dedicated to 250kHz and 320kHz M4 and M8 DRM
operation. Available RX modes:
- LF40kHz, 160kHz: FM0, M2, M4, M8
- LF 250kHz, 320kHz, 640kHz: M4, M8
ISO18000-6C (EPC Gen2) full protocol support
ISO18000-6A,B compatibility in direct mode
Integrated low level transmission coding
Integrated low level decoders
Integrated data framing
Integrated CRC checking
Parallel 8-bit or serial 4-pin SPI interface to MCU using 24 bytes
FIFO
Voltage range for communication to MCU between 1.8V and
5.5V
Selectable clock output for MCU
Integrated supply voltage regulator (20mA), which can be used
to supply MCU and other external circuitry
Integrated supply voltage regulator for the RF output stage,
providing rejection to supply noise
Internal power amplifier (20dBm) for short range applications
Modulator using ASK or PR-ASK modulation
Adjustable ASK modulation index
AM & PM demodulation ensuring no "communication holes"
with automatic I/Q selection
Built-in reception low-pass and high-pass filters having select-
able corner frequencies
Selectable reception gain
Reception automatic gain control
AD converter for measuring TX power using external RF power
detector
DA converter for controlling external power amplifier
Frequency hopping support
On-board VCO and PLL covering complete RFID frequency
range 840MHz to 960MHz
Oscillator using 20MHz crystal
Power down, standby and active mode
Can be powered by USB with no need for step conversion
3 Applications
The device is an ideal solution for UHF RFID reader systems and
hand-held UHF RFID readers.
Revision 3.9
1 - 51
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Summary of Contents for austriamicrosystems AS3990
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Page 1: General Description
On-board VCO and PLL covering complete RFID frequency range 840MHz to 960MHz The AS3990/AS3991 is available in a 64-pin QFN (9mm x 9mm), ensuring the smallest possible footprint. Oscillator using 20MHz crystal Power down, standby and active mode... - Page 2 AS3990/AS3991 Datasheet - A p p l i c a t i o n s Figure 1. Block Diagram 64 2 13 15 VDD_D VDD_RF AS3990 / VDD_B OAD_2 AS3991 VDD_A VDDLF VOSC IQ Down- Gain Filter VDD_RFP Conversion MIX_INP...
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Page 3: Table Of Contents
AS3990/AS3991 Datasheet - C o n t e n t s Contents 1 General Description .................................. 2 Key Features..................................... 3 Applications....................................4 Pin Assignments ..................................4.1 Pin Descriptions....................................5 5 Absolute Maximum Ratings ..............................6 Electrical Characteristics................................7 Detailed Description................................ - Page 4 AS3990/AS3991 Datasheet - C o n t e n t s 8.9.1 Idle (80)...................................... 38 8.9.2 Soft Init (83) ....................................38 8.9.3 Hop to Main Frequency (84) ..............................38 8.9.4 Hop to Auxiliary Frequency (85) ..............................38 8.9.5 Trigger AD Conversion (87)............................... 38 8.9.6 Reset FIFO (8F)..................................
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Page 5: Pin Assignments
AS3990/AS3991 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments Figure 2. Pin Assignments (Top View) COMN_A COMP_B COMN_B VDD_5LFI MIX_INP AS3990/AS3991 MIX_INN MIXS_IN VSN_MIX VDD_D CBIB OSCO VDD_MIX OSCI... - Page 6 AS3990/AS3991 Datasheet - P i n A s s i g n m e n t s Table 1. Pin Descriptions Pin Number Pin Name Pin Type Description Mixer negative supply VSN_MIX Supply Input Internal node de-coupling capacitor to GND...
- Page 7 Positive supply for LF processing, internally regulated to 3.4V Internal node, connect de-coupling capacitor to VDD_5LFI COMP_A Bidirectional Exposed paddle, must be tied to GND EXP_PAD Supply Input 1. Internal Power amplifier is not available on AS3990. www.austriamicrosystems.com/AS3990 www.austriamicrosystems.com/AS3991 Revision 3.9 7 - 51...
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Page 8: Absolute Maximum Ratings
AS3990/AS3991 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of... -
Page 9: Electrical Characteristics
AS3990/AS3991 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics VEXT = 5.3V, typical values at 25ºC, unless otherwise noted. - Page 10 AS3990/AS3991 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s Table 4. Recommended Operating Conditions Symbol Parameter Conditions Units Supply Voltage Supply voltage (bit vext_low set) Operating virtual junction temperature ºC...
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Page 11: Detailed Description
AS3990/AS3991 Datasheet - D e t a i l e d D e s c r i p t i o n 7 Detailed Description The RFID reader IC comprises complete analog and digital functionality for reader operation including transmitter and receiver section with complete EPC Gen2 or ISO18000-6C digital protocol support. -
Page 12: Power Modes
Using this function, the superior system can wake up the reader IC and MCU that are both in the power down mode. If the MCU during 200µs period finds out that the RFID system must react, it confirms the normal mode by setting EN high. Table 5. AS3990/AS3991 Power Modes Power Mode... -
Page 13: Vco And Pll
AS3990/AS3991 Datasheet - D e t a i l e d D e s c r i p t i o n 7.3 VCO and PLL The PLL section is composed of a voltage control oscillator (VCO), prescaler, main and reference divider, phase-frequency detector, charge pump, and loop filter. -
Page 14: Option Registers Preset
AS3990/AS3991 Datasheet - D e t a i l e d D e s c r i p t i o n 7.6 Option Registers Preset After power up (EN low to high transition), the option registers are preset to values that allow default reader operation. Default transmission uses Tari 25µs, PW length is 0.5Tari, TX one length is 2 Tari, and RTcal is 133µs. - Page 15 AS3990/AS3991 Datasheet - D e t a i l e d D e s c r i p t i o n The software designer needs to take care that actual TRcal (reg. 04, 05) and RxLF<3:0> (reg. 03) bits and DR bit in the transmission of the Query command are matched.
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Page 16: Direct Mode
AS3990/AS3991 Datasheet - D e t a i l e d D e s c r i p t i o n 7.7.2 Direct Mode Direct mode is applied if the user wants to use analog functions only and bypass the protocol handling supported in the reader IC. -
Page 17: Amplifier
AS3990/AS3991 Datasheet - D e t a i l e d D e s c r i p t i o n 7.7.4 Amplifier The following two outputs are available: Low power high linear output (~0dBm) can be used for driving an external amplifier. This output uses RFOPX and RFONX pins and it has nominal output impedance of 50Ω. -
Page 18: Rx Gain
AS3990/AS3991 Datasheet - D e t a i l e d D e s c r i p t i o n 7.8.3 RX Gain Gain in the receiving chain can be adjusted to optimize the signal to noise and interference ratio. There are three ways of adjusting: manual adjustment, AGC, and AGL. -
Page 19: Direct Mode
AS3990/AS3991 Datasheet - D e t a i l e d D e s c r i p t i o n The start of the receive operation (successfully received preamble) sets the flags in the ‘IRQ and status’ register. The end of the receive operation is signalled to the host system (MCU) by sending an interrupt request (pin IRQ). -
Page 20: Normal Mode With Mixer Dc Level Output And Enable Rx Output Available
AS3990/AS3991 Datasheet - D e t a i l e d D e s c r i p t i o n 7.8.8 Normal Mode With Mixer DC Level Output And Enable RX Output Available One of the possibilities for achieving low reflected TX power is active tuning of the antenna or the directivity device. For correct tuning, the data on the amplitude and phase of the incoming reflected power is available in the output DC level of the two mixers. -
Page 21: Application Information
Optional 8 I/O IRQ CLSYS VCC UHF Reader AS3990/AS3991 Optional VCO 8.1 Configuration Registers Address Space At power up, the configuration registers are preset to a value that allows default operation. The preset values are given after each register description table. -
Page 22: Main Configuration Registers
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 10. Status Registers Adr (hex) Register Length IRQ and status Interrupt mask register AGC and internal status register... -
Page 23: Control Registers - Low Level Configuration Registers
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Protocol Control (01) – Controls the RFID protocol selection Table 14. Protocol Control (01) Signal Name... - Page 24 AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n RX Options (03) - Gen 2 Table 16. RX Options (03) Signal Name Function Comments...
- Page 25 AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n TRcal High and Miscellaneous Register (05) – Gen 2 Table 18. TRcal High and Miscellaneous Register (05)
- Page 26 AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n RX No Response Wait Time (07) – Defines the time when ‘No Response’ interrupt is sent.
- Page 27 AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n RX Special Setting (09) Table 22. RX Special Setting (09) Signal Name Function Comments reserved for future use (RFU)
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Page 28: Status Registers
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Regulator and I/O Control (0B) Table 24. Regulator and I/O Control (0B) Signal Name Function... - Page 29 Bit of the Tag reception. When enabled, AS3990/AS3991 will generate an active high Interrupt when the length of the received Bit stream from the Tag has been shorter than expected in the RX length e_irq_err2 configuration.
- Page 30 0: 900 MHz VCO Internal VCO type vco_ri<3> 1: 1800 MHz VCO vco_ri<2> VCO pin voltage measurement 7 steps, step size 0.4V vco_ri<1> vco_ri<0> Version Register (13) – Provides the version information. 0x30: AS3990 0x38: AS3991 www.austriamicrosystems.com/AS3990 www.austriamicrosystems.com/AS3991 Revision 3.9 30 - 51...
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Page 31: Test Registers
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.5 Test Registers Measurement Selection (11) Table 31. Measurement Selection (11) Signal Name Function Comments... -
Page 32: Pll, Modulator, Dac, And Adc Registers
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.6 PLL, Modulator, DAC, and ADC Registers CL_SYS, Analog Out and CP Control (14) – (three bytes deep) Table 33. - Page 33 AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Modulator Control Register (15) – (three bytes deep) Table 34. Modulator Control Register (15) Signal Name...
- Page 34 AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n PLL R, A/B Divider Main Register (16) – (three bytes deep) Table 35. PLL R, A/B Divider Main Register (16)
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Page 35: Rx Length Registers
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n ADC Readout Register (19) Table 38. ADC Readout Register (19) Signal Name Function Comments adc<7>... -
Page 36: Fifo Control Registers
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.8 FIFO Control Registers FIFO status – adr 1C hex number of received bytes and FIFO flags. -
Page 37: Direct Commands
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n TX Length Byte2 – adr 1E hex low nibbles of complete bytes, which will be transferred through FIFO and information if there is broken byte and how many bits from it should be transferred. -
Page 38: Idle (80)
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 44. Command Codes Cmd (hex) Command QueryAdjustDown (=TX no TX CRC, no RX CRC) -
Page 39: Delayed Transmission With Crc (93)
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.9.10 Delayed Transmission With CRC (93) Delayed transmission is used in case the transmission needs to be started in a quite narrow time window after end of reception. The time between end of reception and start of transmission is set in register ‘Delayed transmission wait time’... -
Page 40: Reqrn (9F)
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.10.8 ReqRN (9F) The direct ReqRN command issues the ReqRN command to the tag. The last received RN is used as a parameter and the received new RN16 (handle) is stored in an internal register for further communication (ACK, ReqRN…). - Page 41 AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 46. Address / Command Word Bit Distribution Description Bit Function Address Command Address/Command bit 2...
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Page 42: Parallel Interface Communication
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Registers 12, 14, 15, 16, and 17 are three bytes deep. They can be accessed by Continuous address mode only. The least significant byte is accessed first. -
Page 43: Serial Interface Communication
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Figure 8. Data Output Only when CLK is High Stop Cont Start condition continuous mode... -
Page 44: Timing Diagrams
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Timing Requirements for Serial Interface Minimum time interval between IO4 falling edge and first CLK change is 100ns. -
Page 45: Timing Parameters
AS3990/AS3991 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.13.2 Timing Parameters Table 47. Timing Parameters Symbol Parameter Conditions Units General Bit rate Mbps... -
Page 46: Package Drawings And Markings
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 9 Package Drawings and Markings The devices are available in a 64-pin QFN (9mm x 9mm) package. Figure 12. AS3990 Package AS3990 YYWWXZZ Symbol 0.80... - Page 47 AS3990/AS3991 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s Figure 13. AS3991 Package AS3991 YYWWXZZ Symbol 0.80 0.90 1.00 0.02 0.05...
- Page 48 AS3990/AS3991 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s Figure 14. Layout Recommendation According to IPC 7351 Table 48. Layout Dimensions...
- Page 49 AS3990/AS3991 Datasheet - R e v i s i o n H i s t o r y Revision History Revision Date Owner Description Initial revisions 3.81 Updated current consumption, Features, Package Drawings and 24 Nov, 2010 Markings, Ordering Information.
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Page 50: Ordering Information
AS3990/AS3991 Datasheet - O r d e r i n g I n f o r m a t i o n 10 Ordering Information The devices are available as the standard products shown in Table Table 49. Ordering Information... - Page 51 AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information.
- Page 52 Errata sheet AS3990 UHF RFID single chip reader EPC Class1 Gen2 compatible AS3990 Errata Sheet General: Please use this document as a supplement to the preliminary AS3990 Data Sheet R3.0 Known issues of AS3990 Issue description Workaround Digital issues found in v3...
- Page 53 Errata sheet AS3990 Changes and improvements to engineering sample Besides cleaning of known errors in v2.1 samples the following improvements are introduced for v3.0 samples. FIFO increased to 24bytes. New LF=73.5kHz will be selected when RX_LF<3:0>=0100. Enable receive (rxanaon) control via IO2 line in direct mode.
- Page 54 The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein.
- Page 55 Errata sheet AS3991 UHF RFID single chip reader EPC Class1 Gen2 compatible AS3991 Errata Sheet Digital known issues of AS3991 Issue description Workaround Digital issues found in v3.8 When reading out the RX IRQ status, Tx IRQ flag is sometimes high, despite IRQ status was read Read IRQ register two times at the end of data transmission out at the end of TX.
- Page 56 The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein.
- Page 57 Errata sheet AS3991 F. +43 (0) 3136 5692 wireless@austriamicrosystems.com For Sales Offices, Distributors and Representatives, please visit: www.austriamicrosystems.com Revision NoV3.9, 23.12.2010 confidential Page 3 of 3...
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