Operation Schematic Diagram; Rear(Rear If) Schematic Diagram - JVC GZ-MG21US Schematic Diagrams

OPERATION SCHEMATIC DIAGRAM

0 4 OPERATION
TO OPE IF(CN401)
ACES_LED
CHRG_LED
HOST_LED
UPPER
7
FRONT REAR
9
BOTTOM
POFF_SW
PLAY_SW
REC_SW
S403
NSW0099-001X
3
2 MOV/STIL
P_MEDIA
1
4 5
6 7
TO OPE IF
R401
10k
(CN401,402)
KEY_A
R405 R406
TO OPE IF(CN401)
10k 3.3k
KEY_C
SJIG_RST
S402
NSW0161-001X
1
LCD_OPEN
LCD_OPEN
1 2
D403
UDZS6.8B-X
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
USB HOST POW/CHRG
DRV_ACES
S401 NSW0260-001X
OFF PLAY REC
8
10 6 5 4 3 2 1
D404 D407 D401 D405 D402 D406
SML-A12UT-X OPEN SML-A12UT-X OPEN SMLA12BC4T-X OPEN
2 1 S404
NSW0198-001X
AUTO
4 3
R407 R408
6.8k 22k
2 1 2 1 2 1
S411 S412 S405
NSW0198-001X NSW0198-001X NSW0198-001X
LIGHT/INFO TRASH MENU
4 3 4 3 4 3
S413
QSW1153-001
2 RESET
yf132_y30343001a_rev0.1

REAR(REAR IF) SCHEMATIC DIAGRAM

GND
REG_3.1V
CAM_3.1V
TO OPE IF(CN401)
LED_4.9V
REG_4.9V
TO OPE IF
REG_3.1V
(CN401,402)
GND
REG_1.5V
REG_1.2V
TO REG
DRV_3.3V
AL_3.1V
UNREG
REG+CCD
REG-CCD
ADP_L
T_BATT
V_BATT
I_MTR
SJIG_RST
DATA_OUT
CLK_OUT
REG_CS
CHRG_EVR
D_BATT
TO TRIG SW
CN6002
QGF0534F2-06X R604
150k
GND 1 _0.5%
GND 2
HARF_SW 3
R602 R605
FULL_SW 4 39k
3.3k
_0.5%
GND 5
GND 6
BATT_CHK
BATT+
TO REG
DC_CHEK
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
(No.YF132)2-33 2-34(No.YF132)
0 5 REAR(REAR IF)
R601 10k
BATTERY TERM
LY34726-001A
D601
EMZ6.8N-X
3
C604
OPEN
1
2
C602 OPEN
0.1
C603
C601
0.1
R603 0
D602
UDZS16B-X
TO MAIN
(CN103)
CN6001
QGF0508F1-53X
1 GND
2 GND
3 REG_3.1V
4 REG_3.1V
5 REG_3.1V
6 GND
7 CAM_3.1V
8 CAM_3.1V
9 GND
10 REG_4.9V
11 REG_4.9V
12 REG_4.9V
13 GND
14 GND
15 REG_1.5V
16 REG_1.5V
17 REG_1.5V
18 GND
19 GND
20 REG_1.2V
21 REG_1.2V
22 REG_1.2V
23 GND
24 DRV_3.3V
25 DRV_3.3V
26 DRV_3.3V
27 GND
28 AL_3.1V
29 GND
30 UNREGCHK
31 GND
32 REG+CCD
33 GND
34 REG-CCD
35 GND
36 ADP_L
37 GND
38 T_BATT
39 V_BATT
40 GND
41 I_MTR
42 SJIG_RST
43 GND
44 DATA_OUT
45 CLK_OUT
46 GND
47 REG_CS
48 CHRG_EVR
49 DC_CHEK
[-]
TP4
50 KEY_B
51 D_BATT
[D]
52 GND
TP3
53 GND
[T]
TP2
[+]
TP1
yf132_y40166001a_rev0.1