3.3 VMEbus FOUNDATION LOGIC
Typical VMEbus drivers, receivers, and control logic are shown in Figures
3.2-1, 3.3-1, and 3.3-2. The detailed logic design is shown on the schematic in
Appendix A.
3.4 DATA TRANSFERS
Data transfer transceivers are shown in Figure 3.4-1.
transceivers are designed to support write and read operations on 8-, 16-, and 32-bit
boundaries. Thus, the 64 current source/sink outputs are addressable as two 32-bit
longwords, four 16-bit words, or as eight 8-bit bytes.
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The data