Keithley DAS-1800ST Series User Manual page 97

Table A-1. Analog Input Specifications for DAS-1800ST Series (cont.)
Feature
Interrupt levels
Minimum external pacer
clock pulse width
Maximum external pacer
clock rate
Minimum hardware trigger
pulse width
1
Monotonicity is guaranteed over the operating range.
2
The figures in the table show the electrical noise introduced by the analog front end but do not include
the uncertainty inherent in the quantization process. The inherent quantization noise introduced by any
ADC is due to uncertainty at code boundaries and adds a peak-to-peak value of 1 LSB to the electrical
noise; it also makes the rms level 0.5 LSBs.
Table A-2. Analog Input Specifications for DAS-1800HR Series
Feature
Number of channels
Input mode
Resolution
Data format
FIFO size
Channel-Gain Control:
Channel QRAM
Gain QRAM
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DAS-1801ST/ST-DA
3, 5, 7, 10, 11, and 15
10ns
333kHz
10ns
DAS-1802HR/HR-DA
Software-selectable as 8 differential or 16 single-ended
Software-selectable as unipolar or bipolar
16-bits (1 part in 65,536 or 15 ppm)
16-bit 2's complement
1024 word
256 X 8 bits (256 channels maximum)
256 X 2 bits (four gain ranges)
DAS-1802ST/ST-DA
A-3