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Sunx SL-VISA Instruction Manual

Isa bus s-link v control board
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CMJE-SLVISA No.0006-81V

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Summary of Contents for Sunx SL-VISA

  • Page 1 CMJE-SLVISA No.0006-81V...
  • Page 2 1. Introduction Thank you very much for using SUNX products. Please read this Instruction Manual carefully and thoroughly for the correct and optimum use of this product. Kindly keep this manual in a conve- nient place for quick reference. Never use this product in a device for personnel protection.

  • Page 3: Functional Description

    3. Functional Description 1) S-LINK V terminal block connector View from wiring side Terminal Remarks Black White Blue +24V Brown External power supply input +24V F.G. Frame ground Tightening torque of the terminal screws: 0.5 to 0.6 N·m Terminal block connector: MSTB2.5/7-STF-5.08 (with ange) (Made by Phoenix Contact) 2) I/O rst address setting switch (SW5, SW6) I/O rst address setting switch sets the rst 3 digits of the 4 digit PC/AT hexadecimal I/O address.
  • Page 4 Example 1) I/O rst address: 0300H Example 2) I/O rst address: 0F80H Set value ON / OFF Set value ON / OFF With the above setting, I/O address 0300H to With the above setting, I/O address 0F80H to 034FH are occupied. 0FCFH are occupied.
  • Page 5 4) I/O setting switch (SW3, SW4) I/O setting is done for each 32 points with the I/O setting switch (SW3, SW4). Setting is read in only once when power is supplied to the computer or when the reset command is executed on the S-LINK V system side.
  • Page 6 4. Assignment on computer R/W: Read out / Write in, R: Read out only Computer I/O address Assignment (hexadecimal) Bank change-over response register HML0 + 00 (initial value) Data S-LINK V Address Address Address area HML0 + 3F S-LINK V I/O unit where where...
  • Page 7 1) HML0 + 00 to HML0 + 3F: Data area Relationship between “Computer I/O address” and “S-LINK V address” Computer I/O S-LINK V address address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 (hexadecimal) HML0 + 00 HML0 + 01...
  • Page 8 Computer I/O S-LINK V address address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 (hexadecimal) HML0 + 39 HML0 + 3A HML0 + 3B HML0 + 3C HML0 + 3D HML0 + 3E HML0 + 3F In case [Bank change-over response register = 00H] (Initial value) (S-LINK V I/O data) This is an area to read out input data and write in output data of S-LINK V I/O units.
  • Page 9 Bank change-over procedure User’s computer It writes bank number into the bank change-over request register. SL-VISA Internal circuit reads out bank number of the bank change-over request register. SL-VISA Internal circuit switches the data area to the information corresponding to the bank number.
  • Page 10 2) HML0 + 40: Transmission mode · I/O control points Transmission mode and I/O control points are stored. Unused (= 0) I/O control points 512 480 448 416 384 352 320 288 256 224 192 160 128 Indication Transmission mode A mode B mode C mode...
  • Page 11 5) HML0 + 48: Error No. / Error state Unused (= 0) Error No. Description System (control board) abnormality Short-circuit between +24V and D Short-circuit between D and G Abnormality or disconnection of I/O unit Unrecognized unit added Output short-circuit of the output unit · I/O device driver power supply shut down System set is not carried out properly Error states (1: Error occurrence, 0: Normal operation, error recti ed)
  • Page 12 bit 3: “System set” It reads in the S-LINK V I/O unit connection state at that time. If “1” is written into HML0 + 49 bit 3, HML0 + 4A bit 3 turns to “1” after the completion of system setting. bit 4: “Interruption indication”...
  • Page 13 11) HML0 + 4E: Input hold / Input change interruption / Input change interruption / Occurrence condition / Error interruption Unused (= 0) Assignment Input hold (1: Hold, 0: Hold cancel) Input change interruption (1: Effective, 0: Ineffective) Occurrence condition for input change interruption (1: ON OFF, 0: OFF Error interruption (1: Effective, 0: Ineffective) bit 0: If the input signal is changed, “Input hold”...
  • Page 14 bit 3: “Error interruption” sets whether an interruption occurs or not when an error occurs. When bit 3 is “1” an interruption occurs, and when bit 3 is “0” the interruption does not oc- cur. In case the error interruption is set to effective, the interruption occurs with OR operation applied to all error occurrences.

  • Page 15: Specifications

    4) It is necessary to load the driver program before using this board. Please download the driver program from 'SUNX website (URL: sunx.com)' or contact our of ce. [Driver program is available for Windows 95/98, Windows 2000, Windows NT and Windows Me.] If you cannot ac- cess our website, please contact our sales of ce.
  • Page 16 During the above mentioned period, if a failure of the product occurs under normal use and op- eration, and if SUNX determines that it is responsible for the failure, it shall repair the defect or replace the product. However, in no event shall SUNX be liable for the failure, damage or loss...