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Wolfson WM8778-EV1B User Handbook Manual

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WM8778-EV1B
Evaluation Board User Handbook
Rev 1.1

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Summary of Contents for Wolfson WM8778-EV1B

  • Page 1 WM8778-EV1B Evaluation Board User Handbook Rev 1.1...

  • Page 2: Table Of Contents

    WM8778-EV1B PCB LAYOUT..............33 WM8778-EV1B BILL OF MATERIAL............37 APPENDIX ....................39 DAC AND ADC ALTERNATIVE AUDIO INTERFACE CONFIGURATION.... 39 EXTERNAL DSP CONNECTION TO THE WM8778-EV1B ........41 ADDITIONAL WM8778-EV1B SETUP RECOMMENDATIONS ......45 EVALUATION SUPPORT ................47 IMPORTANT NOTICE ................... 48...

  • Page 3: Introduction

    WM8778. GETTING STARTED EVALUATION KIT CHECKLIST The following items are available from Wolfson: • WM8778-EV1B Evaluation Board (order from Wolfson) •...

  • Page 4: Evaluation Board Operation

    WM8778-EV1M EVALUATION BOARD OPERATION POWER SUPPLIES Using appropriate power leads with 4mm connectors, power supplies should be connected as described in Table 1. REF-DES SOCKET NAME SUPPLY DGND DVDD +2.7V to +3.6V AVDD +2.7V to +5.5V AGND +12V +12V -12V -12V Table 1 Power Supply Connections The DGND and AGND connections may be connected to a common GND on the supply with...

  • Page 5: Digital Input

    WM8778-EV1M DIGITAL INPUT REF-DES SOCKET NAME SIGNAL SPDIF_IN Digital (AES/EBU, UEC958, S/PDIF, EIAJ CP340/1201) signal. DIGITAL_OPTICAL INPUT Digital (AES/EBU, UEC958, S/PDIF, EIAJ CP340/1201) optical signal. Table 2 Digital Inputs ANALOGUE INPUT REF-DES SOCKET NAME SIGNAL AINR Analogue Input signal AINL Analogue Input signal Analogue signals applied to these connectors can be selected for active or passive anti-aliasing filtering and are also AC coupled before being input to the WM8778.

  • Page 6: Interfaces

    WM8778-EV1M INTERFACES Figure 1 Interfaces HEADERS SIGNAL SIGNAL DACDAT 16/15 14/13 ADCMCLK DACLRC 12/11 10/9 ADCDOUT DACBCLK 9/10 11/12 ADCBCLK 13/14 DACMCLK 15/16 ADCLRC LNK1 SIGNAL LNK2 SIGNAL ZFLAGR ZFLAGL AGND AGND Rev 1.1, February 2004...

  • Page 7: Jumpers

    WM8778-EV1M WM8778 PIN NAME WM8778 PIN NAME AINL CE/I2S ZFLAGR DI/DEEMPH ZFLAGL CL/IWL DACBCLK VOUTL DACMCLK VOUTR VMIDDAC DACLRC DACREFN ADCBCLK DACREFP ADCMCLK VMIDADC DOUT ADCREFGND ADCLRC ADCREFP DGND AVDD DVDD AGND MODE AINR Table 6 Headers JUMPERS JUMPERS JUMPER STATUS DESCRIPTION OPEN DAC Slave Mode (Level shift direction)

  • Page 8: Switches

    WM8778-EV1M SWITCHES SWITCHES SWITCH STATUS DESCRIPTION DATA FORMAT (DATA FORMAT) S Compatible [default setting] 24-bit Right Justified Left Justified After an input data format change has been made using SW1, the CS8427 will only latch the new settings after SW2 has been pressed and released.

  • Page 9: Hardware Control

    Figure 2 used with the settings specified in Table 10 will assist in setting the WM8778-EV1B into a hardware configuration for DAC (slave mode) playback. This is to ease the initial use of the WM8778 until the user becomes familiar with the device operation. For ADC or bypass configuration please refer to the ADC and line setup sections.
  • Page 10 WM8778-EV1M LINKS AND LINK / JUMPER / DESCRIPTION JUMPERS SWITCH POSITION Fit jumpers (1,2) DAC clocks (5,6) (9,10) (13,14) No jumpers ADC Clocks OPEN DAC Slave Mode J9 (BCLK) OPEN DAC uses BCLK, no common BCLK for ADC J11 (LRC) OPEN DAC uses LRCLK, no common LRCLK for ADC OPEN...

  • Page 11: Software Control

    WM8778-EV1M SOFTWARE CONTROL There are two possible serial software control modes that may be selected to operate the WM8778. The standard SPI user interface is a 3-wire solution with the second option being a two-wire solution. SPI INTERFACE MODE To operate the WM8778 in SPI (3-wire) mode, switch SW7 must be set to position 1, selection of software mode will be indicated by D1 being OFF.

  • Page 12: Register Map

    WM8778-EV1M REGISTER MAP ADDRESS (Bit REGISTER 15 – 9) Bit[8] Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[1] Bit[0] R3 (03h) 0000011 UPDATED LDA[7:0] R4 (04h) 0000100 UPDATED RDA[7:0] R5 (05h) 0000101 UPDATED MASTDA[7:0] R6 (06h) 0000110 PHASE[1:0] R7 (07h) 0000111 DZCEN PL[3:0] R8 (08h)

  • Page 13: Serial Interface Software Description

    “DAC Setup”, “ADC Setup” and “Line Setup” will be provided. SOFTWARE DOWNLOAD The current evaluation board software should be downloaded from the Wolfson website [www.wolfsonmicro.com]. From the homepage it is recommended that you do a search for ‘WM8778’ and select the ‘more’...

  • Page 14: Software Operation

    WM8778-EV1M SOFTWARE OPERATION Due to the many features offered by the WM8778 the software has been split into 4 different panels. This eases the complexity of the software making each panel less busy, the panels have also been grouped so that it makes it simple to control each logical section of the device.
  • Page 15 WM8778-EV1M WOLFSON LOGO Left clicking on the Wolfson logo will open the PCs default web browser and go top the Wolfson Microelectronics website (‘www.wolfsonmicro.com’). On the main panel there are three buttons, “DAC Setup”, “ADC Setup” and “Line Setup” which have been provided as a quick start approach. Pressing either of these buttons will power up the DAC, ADC or Line signal paths in a known state as described in the following pages.
  • Page 16 WM8778-EV1M ADC, DAC AND OUTPUT CONTROL PANEL Figure 7 ADC, DAC and Output Control The ADC, DAC and Output Control panel is used to control the ADC, DAC and Output Mixer related features of the WM8778. Pressing the ‘ADC, DAC and Output Submit’ button will cause the settings shown on this panel to be written to the WM8778.
  • Page 17 WM8778-EV1M VOLUME CONTROL PANEL Figure 8 Volume Control The Volume Control panel is used to control both analogue and digital volume settings of the WM8778. The volume sliders update in ‘real’ time (i.e. the ‘Volume Submit’ button does not have to be pressed to update the output volume level) but will only have an effect on the output if the Volume Update bits are set.
  • Page 18 WM8778-EV1M LIMITER/ALC CONTROL PANEL Figure 9 Limiter/ALC Control The Limiter/ALC Control panel is used to control the many options offered by the WM8778 for either ALC (Automatic Level Control) or Limiter operation. The default of the WM8778 is for the operation to be disabled, this must firstly be enabled and then the correct limiter or ALC function selected.

  • Page 19: Dac Setup

    WM8778-EV1M DAC SETUP By pressing the ‘DAC Setup’ button, the software writes to the device setting the SPDIF_IN through DAC to the VOUTL/R outputs; active in 24-bit, I S input data format. Table 12 lists the required board settings to allow this signal path to become active. This is to ease the initial use of the WM8778 hardware and software until the user becomes familiar with both device and software operation.
  • Page 20 WM8778-EV1M LINKS AND LINK / JUMPER / DESCRIPTION JUMPERS SWITCH POSITION Fit jumpers (1,2) DAC clocks (5,6) (9,10) (13,14) No jumpers ADC Clocks OPEN DAC Slave Mode J9 (BCLK) OPEN DAC uses BCLK, no common BCLK for ADC J11 (LRC) OPEN DAC uses LRCLK, no common LRCLK for ADC OPEN...

  • Page 21: Adc Setup

    WM8778-EV1M ADC SETUP By pressing the ‘ADC Setup’ button, the software writes to the device setting the AINL/R through ADC to SPDIF_OUT path active. As with the DAC setup described previously, this is to ease the initial use of the WM8778 until the user becomes familiar with both device and software operation.
  • Page 22 WM8778-EV1M LINKS AND LINK / JUMPER / DESCRIPTION JUMPERS SWITCH POSITION Fit Jumpers (5,6) DAC clocks for ADC (Using J9, J11 and J14) (9,10) (13,14) Fit jumpers (1,2) ADC Clocks and data to Crystal (5,6) (9,10) OPEN DAC Slave Mode J9 (BCLK) SHORT Common BCLK for ADC...

  • Page 23: Line Setup

    WM8778-EV1M LINE SETUP By pressing the ‘Line Setup’ button, the software writes to the device setting the AINL/R through the analogue path to the VOUTL/R outputs. As with the previous configurations, this is to ease the initial use of the WM8778 until the user becomes familiar with both device and software operation.
  • Page 24 WM8778-EV1M LINKS AND LINK / JUMPER / DESCRIPTION JUMPERS SWITCH POSITION No Jumpers DAC clocks and data No Jumpers ADC clocks and data OPEN DAC Slave Mode J9 (BCLK) OPEN Common BCLK for ADC J11 (LRC) OPEN Common LRCLK for ADC OPEN ADC Slave Mode J14 (MCLK)

  • Page 25: Schematic Layout

    WM8778-EV1M SCHEMATIC LAYOUT Figure 13 Functional Diagram Rev 1.1, February 2004...
  • Page 26 WM8778-EV1M Figure 14 Digital Input Rev 1.1, February 2004...
  • Page 27 WM8778-EV1M Figure 15 Software Control Rev 1.1, February 2004...
  • Page 28 WM8778-EV1M Figure 16 Level Shift Rev 1.1, February 2004...
  • Page 29 WM8778-EV1M Figure 17 Analogue Input and Output Mute Rev 1.1, February 2004...
  • Page 30 WM8778-EV1M Figure 18 WM8778 Rev 1.1, February 2004...
  • Page 31 WM8778-EV1M Figure 19 Analogue Output Rev 1.1, February 2004...
  • Page 32 WM8778-EV1M Figure 20 Power Rev 1.1, February 2004...

  • Page 33: Wm8778-Ev1B Pcb Layout

    WM8778-EV1M WM8778-EV1B PCB LAYOUT Figure 21 Top Layer Silkscreen Rev 1.1, February 2004...
  • Page 34 WM8778-EV1M Figure 22 Top Layer Rev 1.1, February 2004...
  • Page 35 WM8778-EV1M Figure 23 Bottom Layer Rev 1.1, February 2004...
  • Page 36 WM8778-EV1M Figure 24 Bottom Layer Silkscreen Rev 1.1, February 2004...

  • Page 37: Wm8778-Ev1B Bill Of Material

    WM8778-EV1M WM8778-EV1B BILL OF MATERIAL DESCRIPTION REFERENCE DESIGNATOR 0.1uF 0805 SMD Ceramic Capacitor 50V X7R C1, C4, C5, C7, C8, C10, C13, C20, C23, C28, C30, C32, C35, C42, C44, C45, C47, C49, C50, C51, C52, C54, C55, C59, C60, C63, C66, C67, C71, C72, C75 0.1uF 0603 SMD Ceramic Capacitor 16V X7R...
  • Page 38 WM8778-EV1M DESCRIPTION REFERENCE DESIGNATOR 620R 0805 SMD chip resistor 1% 0.1W 49R9 0805 SMD chip resistor 1% 0.125W R74,R78 100K 0805 SMD chip resistor 1% 0.1W R8, R14, R25 3K 0805 SMD chip resistor 1% 0.1W 1K 0805 SMD chip resistor 1% 0.1W 75R 0805 SMD chip resistor 1% 0.125W Slotted Panhead Screw - M3 thread;...

  • Page 39: Appendix

    MASTER/SLAVE MODE The WM8778-EV1B has the ability to configure the WM8778 for independent DAC and ADC in either master or slave mode. This means that there are four configurable options, the following tables detail the recommended jumper settings to configure the audio interfaces for the specified operation.
  • Page 40 S Compatible Notes: The WM8778-EV1B does not have the functionality to create a separate ADCMCLK. There are two options for the ADCMCLK. One is to use the common DACMCLK by fitting J9, as suggested in table above. The other is to apply an external MCLK to H2/13 and the ground to pin H2/15.

  • Page 41: External Dsp Connection To The Wm8778-Ev1B

    WM8778-EV1M EXTERNAL DSP CONNECTION TO THE WM8778-EV1B The WM8778-EV1B evaluation board has been designed to allow it to be easily connected to an external DSP platform with error free operation. The following information is provided to ease the connection process and ensure that all signals sent and received by the WM8778-EV1B are reliable and at the correct voltage levels.
  • Page 42 WM8778-EV1M Figure 26 Data Connection to the DSP Platform (+5V tolerant input levels) The connection in Figure 26 is applicable when links J9, J11 and J14 are fitted for common DAC and ADC MCLK, BCLK and LRC clocks. If separate ADC clocks are required then remove links J9, J11 and J14 and connect the separate clocks as shown in Figure 27.
  • Page 43 DSP platform to the WM8778-EV1B. A direct connection can be made to pin 1 (CE), pin 2 (DI) and pin 3 (CL) of header strip H4 for 3-wire software mode as shown in Figure 30.
  • Page 44 WM8778-EV1M CONNECTION DIAGRAMS Software Control WM8778-EV1B Audio Interface Platform Figure 29 DSP Connection with PC Control using Wolfson Software WM8778-EV1B Audio Interface Platform Software Control Figure 30 Full DSP Control Rev 1.1, February 2004...

  • Page 45: Additional Wm8778-Ev1B Setup Recommendations

    WM8778-EV1M ADDITIONAL WM8778-EV1B SETUP RECOMMENDATIONS ADC TO DAC LOOPBACK Setting the WM8778-EV1 into loopback mode allows an analogue signal to be applied to AINL/R, passed through the ADC, looped into the DAC and output on the VOUTL/R outputs. AVDD DVDD +2.7V...
  • Page 46 WM8778-EV1M LINKS AND LINK / JUMPER / DESCRIPTION JUMPERS SWITCH POSITION Fit jumpers (5,6) DAC clocks (9,10) (13,14) No jumpers ADC Clocks OPEN DAC Slave Mode J9 (BCLK) SHORT Common BCLK J11 (LRC) SHORT Common LRCLK OPEN ADC Slave Mode J14 (MCLK) SHORT Common MCLK...

  • Page 47: Evaluation Support

    The aim of this evaluation kit is to help you to become familiar with the functionality and performance of the WM8778 CODEC. If you require more information or require technical support please contact Wolfson Microelectronics Applications group through the following channels: Email: apps@wolfsonmicro.com...

  • Page 48: Important Notice

    WM8778-EV1M IMPORTANT NOTICE Wolfson Microelectronics plc (WM) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current.

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