Details And Waveforms On System Test And Debugging; System 27Mhz Clock, Reset, Flash R/W Signal - LG DP132 Service Manual

DETAILS AND WAVEFORMS ON SYSTEM TEST AND DEBUGGING

1. SYSTEM 27MHz CLOCK, RESET, FLASH R/W SIGNAL

1) SPHE8202RQ-D main clock is at 27MHz (Y2)
1
2) SPHE8202RQ-D reset is active high.
2
3
4
CLKOUT
FIG 1-1
3.3V
POCN
RESET
FIG 1-2
3-18
1
Y2 Y2
R25 R25 75 75 27MHz/30PPM 27MHz/30PPM CLKIN
R26 R26 100K 100K
C21 C21 C22 C22
33pF/50V/NP0 33pF/50V/NP0 33pF/50V/NP0 33pF/50V/NP0
GND
DVCC3
2
TP17 TP17
R56 R56
3 4
27K 27K
R128 R128 1K 1K RESET1
RESET
C99 C99 C41 C41
2.2uF/10V/Y5V 2.2uF/10V/Y5V 0.1uF/25V/Y5V 0.1uF/25V/Y5V
GND