2.
The seek operation initiated by the preceding load address function and buffer
is incomplete as indicated by a seek error signal for the selected unit.
(Applicable to all models, indicated by status 0015)
HEADER VERIFICATION ERROR
An address error occurs during a header verification sequence if any of the following
conditions are detected.
1.
The content of the controller address register does not compare with the
address being read from the selected storage unit (on all 3234 models, indi-
cated by status 0215).
2.
A checkword error is detected in the address being read (on .the 3234-A/B/C
models, indicated by status 0215; on the 3234-D/E models, indicated by
status 0255).
3.
An address in which the defective sector bit is being read (on the 3234-A/ B/ C
models, indicated by status 4215; on the 3234-D/E models, indicated by
status 4205).
4.
An address in which the incorrect sync bit has been detected, causing the
checkword error, defective sector, and write lockout bits to be detected
(on the 3234-A/B/C models, indicated by status 4315; on the 3234-D/E models,
indicated by status 4355).
On detection of an address error the associated status bit sets, and if selected, the
abnormal end of operation interrupt is generated on initiation of an operation.
(If
the
abnormal end of operation interrupt is not selected, the channel hangs up on initiation
of the operation.)
DEFECTIVE SECTOR
In order to prevent reading or writing in a sector which contains a defective (faulty)
recording medium, a defective sector bit is normally written in each faulty sector.
The sector is defective when this bit is a
o.
2-32
60333300 B
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