Sony SAT-W60 Service Manual page 44

8 7
SYSAD<31..0>\I 31
D
3 0
2 9
2 8
2 7
2 6
2 5
2 4
2 3
2 2
AD<30>\I IDSEL 21
2 0
19
18
17
16
15
14
13
12
SYS_CMD<8..0>\I 11
10
9
8
7
C
6
+ 3 _ 3 V
5
4
R1639
3
6 0 3 2
10K
1
EMPTY
R1640
0
6 0 3
10K
8
EMPTY
R1641
7
6 0 3 6
10K
5
VALIDIN_N\I 4
3
VALIDOUT_N\I 2
1
FUD_VALIDIN_N\I
0
FUD_VALIDOUT_N\I
PRE_WRT_RDY_O_N\I
B
WRT_RDY_N\I
REL_N\I
EXTREQ_N\I
CLK\I
R1642
10K
5 %
6 0 3
EMPTY
+ 3 _ 3 V
1 3
R1643 EMPTY
0 R1644
1/16W 10K
5 % 5 %
A 2
INTR\I
6 0 3
EMPTY 3
Q1601
1
MMBT2222ALT1
SOT23
2
NOTES
IF NO FUD, LOAD R1640, R1641, R1642
8 7
6
27 S Y S A D < 3 1 >
26 S Y S A D < 3 0 >
22 S Y S A D < 2 9 >
21 S Y S A D < 2 8 >
19
S Y S A D < 2 7 >
17
S Y S A D < 2 6 >
13
S Y S A D < 2 5 >
11 S Y S A D < 2 4 >
7 S Y S A D < 2 3 >
5 S Y S A D < 2 2 >
3 S Y S A D < 2 1 > V S S 3 < 6 > 192
206 166
S Y S A D < 2 0 > V S S 3 < 5 >
204 119
S Y S A D < 1 9 > V S S 3 < 4 >
202 91
S Y S A D < 1 8 > V S S 3 < 3 >
198 S Y S A D < 1 7 > V S S 3 < 2 > 65
196 S Y S A D < 1 6 > V S S 3 < 1 > 38
197 16
S Y S A D < 1 5 > V S S 3 < 0 >
199
S Y S A D < 1 4 >
203 164
S Y S A D < 1 3 > V S S 2 < 5 >
205 142
S Y S A D < 1 2 > V S S 2 < 4 >
207 SYSAD<11> V S S 2 < 3 > 124
4 S Y S A D < 1 0 > V S S 2 < 2 > 64
6 S Y S A D < 9 > V S S 2 < 1 > 45
8 2
S Y S A D < 8 > V S S 2 < 0 >
12
S Y S A D < 7 >
14 200
S Y S A D < 6 > V S S < 2 0 >
18 S Y S A D < 5 > V S S < 1 9 > 193
20 S Y S A D < 4 > V S S < 1 8 > 184
31 S Y S A D < 3 > V S S < 1 7 > 177
30 S Y S A D < 2 > V S S < 1 6 > 162
29 155
S Y S A D < 1 > V S S < 1 5 >
28 148
S Y S A D < 0 > V S S < 1 4 >
131
V S S < 1 3 >
182 S Y S _ C M D < 8 > V S S < 1 2 > 123
183 S Y S _ C M D < 7 > V S S < 1 1 > 113
186 S Y S _ C M D < 6 > V S S < 1 0 > 106
187 S Y S _ C M D < 5 > V S S < 9 > 96
188 90
S Y S _ C M D < 4 > V S S < 8 >
189 82
S Y S _ C M D < 3 > V S S < 7 >
190 74
S Y S _ C M D < 2 > V S S < 6 >
191 S Y S _ C M D < 1 > V S S < 5 > 60
194 S Y S _ C M D < 0 > V S S < 4 > 32
V S S < 3 > 23
179 VALIDIN_N V S S < 2 > 15
180 9
VALIDOUT_N V S S < 1 >
33 1
FUD_VALIDIN_N V S S < 0 >
34
FUD_VALIDOUT_N
C_BE_N<3>\I
35 P R E _ W R T _ R D Y _ O _ N C _ B E < 3 > 92
C_BE_N<2>\I
178 W R T _ R D Y _ N C _ B E < 2 > 103
C_BE_N<1>\I
181 112
REL_N C _ B E < 1 >
195 126 C_BE_N<0>\I
EXTREQ_N C _ B E < 0 >
167
CLK
139 105 IRDY_N\I
INTR IRDY_N
TRDY_N\I
TRDY_N 108
STOP_N\I
S T O P _ N 110
DEVSEL_N\I
159 T E S T _ M O D E < 2 > DEVSEL_N 109
FRAME_N\I
158 104
T E S T _ M O D E < 1 > F R A M E _ N
157
T E S T _ M O D E < 0 >
160 68 IDSEL
TEST_SCANEN IDSEL
PCI_CLK\I
172 U N U S E D PCI_CLK 69
AD<31..0>\I
+ 3 _ 3 V
PAR\I
R1613
5 % 4.7K
6 0 3
1
2
3
6
5 4
U1601
P Q F P
F U D 2
VCXO_CTL0 140
VCXO_CTL1 141
PIXEL_CLK 143
144
AUDIO_CLK
G C R _ C L K 47
+ 3 _ 3 V U N U S E D 4 46
208 V D D 3 < 7 > VCXO_CTL2 44
170 42
V D D 3 < 6 > MISC_CLK
165 41
V D D 3 < 5 > U N U S E D 3
147 40
V D D 3 < 4 > U N U S E D 2
107 V D D 3 < 3 > TRANS0_STALL 39
75 V D D 3 < 2 > TRANS0_DATA 36
43 48
V D D 3 < 1 > TRANS0_CLK
25 49
V D D 3 < 0 > TRANS0_RDY
50
TRANS0_SYNC
201 51
V D D < 1 2 > T R A N S 0 _ E R R O R
185 V D D < 1 1 >
169 V D D < 1 0 > U N U S E D 5 59
163 V D D < 9 > PO_DATA_CLK 58
156 57
V D D < 8 > PO_DATAVLD
132 56
V D D < 7 > PO_STALL
114 55
V D D < 6 > P O _ S Y N C
97 V D D < 5 > PO_DATAOUT 54
83 V D D < 4 > TRANS1_STALL 53
61 V D D < 3 > TRANS1_DATA 52
37 V D D < 2 > TRANS1_CLK 62
24 63
V D D < 1 > TRANS1_RDY
10 66
V D D < 0 > TRANS1_SYNC
67
TRANS1_ERROR
31
80 A D < 3 1 >
3 0 81 A D < 3 0 > G P I O < 7 > 154
2 9 84 A D < 2 9 > G P I O < 6 > 153
2 8 85 A D < 2 8 > G P I O < 5 > 152
2 7 86 151
A D < 2 7 > G P I O < 4 >
2 6 87 150
A D < 2 6 > G P I O < 3 >
2 5 88 149
A D < 2 5 > G P I O < 2 >
2 4
89 A D < 2 4 > GPIO<1> 146
2 3 93 A D < 2 3 > G P I O < 0 > 145
2 2 94 A D < 2 2 >
21 95 A D < 2 1 > R E Q _ S L O T _ N < 3 > 73
2 0 98 72
A D < 2 0 > R E Q _ S L O T _ N < 2 >
19 99 71
A D < 1 9 > R E Q _ S L O T _ N < 1 >
18 100 70
A D < 1 8 > R E Q _ S L O T _ N < 0 >
17
101 A D < 1 7 >
16 102 A D < 1 6 > G N T _ S L O T _ N < 3 > 79
15 115 78
A D < 1 5 > G N T _ S L O T _ N < 2 >
14 116 77
A D < 1 4 > G N T _ S L O T _ N < 1 >
13 117 76
A D < 1 3 > G N T _ S L O T _ N < 0 >
12 118
A D < 1 2 >
11
120 A D < 1 1 > ENDIAN_CONFIG 138
10
121 A D < 1 0 > RESET_N 137
9 122 A D < 9 >
8 125
A D < 8 >
7 127 168
A D < 7 > P L L _ M P O
6 128 171
A D < 6 > PLL_DVD
5
129 A D < 5 > PLL_VAA 173
4
130 A D < 4 > PLL_LP 174
3 133 A D < 3 > PLL_AGN 175
2 134 A D < 2 > PLL_DGN 176
1 135 161
A D < 1 > PLL_BYPASS
0 136
A D < 0 >
111 P A R
This document contains privileged or otherwise legally protected
information.
than the recipient is not authorized.
or otherwise use this document unless you are an authorized
representative of a named recipient.
DRAWING
SET:
TITLE=BLK_FUD
A B B R E V = B F U D
LAST_MODIFIED=Tue Mar 21 17:57:23 2000
ENGINEER:
5 4
3 2
R1617
C1621
1K 5 %
6 0 3 0.1UF
PIXEL_CLK\I 2 0 %
AUDIO_CLK\I
50V
C E R M
8 0 5
R1618
7
1K 5 %
6 6 0 3
5
4
3
2
1
TRANS0_DATA<7..0>\I
0
TRANS0_CLK\I
TRANS0_RDY\I
TRANS0_SYNC\I
C1624
TRANS0_ERROR\I
0.1UF
2 0 %
7
50V
6 C E R M
5
8 0 5
4
3
2
1
TRANS1_DATA<7..0>\I
0
TRANS1_CLK\I
TRANS1_RDY\I
TRANS1_SYNC\I
TRANS1_ERROR\I
GPIO<7>\I
GPIO<6>\I
GPIO<5>\I
GPIO<4>\I
GPIO<3>\I
GPIO<2>\I
GPIO<1>\I
GPIO<0>\I
REQ_SLOT_N<3>\I
REQ_SLOT_N<2>\I + 3 _ 3 V
REQ_SLOT_N<1>\I
REQ_SLOT_N<0>\I
GNT_SLOT_N<3>\I
1
GNT_SLOT_N<2>\I
R1601
GNT_SLOT_N<1>\I
4.7K
GNT_SLOT_N<0>\I
5 %
6 0 3
2
ENDIAN_CONFIG
RESET_N\I
+ 3 _ 3 V
PLL_DVD
3
PLL_VAA
R1606
5 % 4.7K
PLL_AGN
6 0 3
1
PLL_DGN
2
3
C WEBTV NETWORKS, INC. 1999
Disclosure of this information to anyone other
You may not read, copy,
E L M E R F U D
BLOCK: DATE:
FULLER APPROVED:
3 2
1
MPEG_VCXO_CTL0\I
C1622
D
10UF
2 0 %
10V
C E R M
1210
MPEG_VCXO_CTL1\I
C1625
10UF
2 0 %
10V
C E R M
1210
C
B
A
REVISION: 0.0
B L O C K
PAGE: 1 of 2
REVISION:
PVT
SET
3 0 3 7
PAGE: of
1