3.4.2.2
3.4.2.3
3.4.2.4
3.4.3
3.4.4
3.4.4.1
3.4.5
3.4.6
3.4.7
3.4.8
3.5
Setup submenu: Chipset...................................................................................... 69
3.5.1
Chipset: Host Bridge .................................................................................. 70
3.5.2
Chipset: South Bridge ................................................................................. 71
3.5.2.1
3.5.2.2
3.5.2.3
3.6
3.7
Setup submenu: Boot ........................................................................................... 76
3.8
4.1
A.1
A.2
B.1
I/O Address Map ................................................................................................... 93
B.2
Memory Address Map ......................................................................................... 94
B.3
IRQ Mapping Chart .............................................................................................. 95
Preface
XIII