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V3.02
Revision:
Date:
03-Apr-2017 12:20
TE0600 TRM

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Summary of Contents for Trenz Electronic TE0600 TRM

  • Page 1 TE0600 TRM V3.02 Revision: Date: 03-Apr-2017 12:20...
  • Page 2: Table Of Contents

    J2 Pin-out _________________________________________________________________________ 22 Signal Integrity Considerations _________________________________________________________ 24 Module revisions and assembly variants ___________________________________________________ 25 Related Materials and References ________________________________________________________ 27 Data Sheets ________________________________________________________________________ 27 Documentation Archives ______________________________________________________________ 27 User Guides ________________________________________________________________________ 27 Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 3 Document Change History ______________________________________________________________ 31 Disclaimer ___________________________________________________________________________ 32 Document Warranty __________________________________________________________________ 32 Limitation of Liability _________________________________________________________________ 32 Copyright Notice ____________________________________________________________________ 32 Technology Licenses _________________________________________________________________ 32 Environmental Protection _____________________________________________________________ 32 REACH, RoHS and WEEE ____________________________________________________________ 33 Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 4: Overview

    Revision: V3.02 Overview Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de /display/PD/TE0600 Trenz Electronic GigaBee XC6SLX series are industrial-grade FPGA micromodules integrating a leading-edge Xilinx Spartan-6 LX FPGA, Gigabit Ethernet transceiver (physical layer), two independent banks of 16-bit-wide 128/512 MBytes DDR3 SDRAM, 16 MBytes SPI Flash memory for configuration and operation, and powerful switch-mode power supplies for all on-board voltages.
  • Page 5: Key Features

    Evenly-spread supply pins for good signal integrity Additional assembly options are available for cost or performance optimization upon request. Initial Delivery State Storage device name Content Notes SPI Flash memory Blinky Demo protected 1-Wire EEPROM not programmed Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 6: Power Consumption

    Power supply – 5 V from baseboard Connected Gigabit Ethernet cable FPGA type Unconfigured Configured with Web-server reference design LX45 0.15 A 0.6 A LX100 0.17 A 0.5 A LX150 0.2 A 0.5 A Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 7: Detailed Description

    GigaBee XC6SLX board must be powered at least in one of the following two ways: through B2B connector J1 (pins 1, 3, 5, 7, 9, 11, 13, 15), through B2B connector J2 (pins 2, 4, 6, 8, 10, 12). Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 8: Fpga Banks Vccio Power Supply

    Power Rail . Bank 1 VCCIO supply voltage is configured to 1.5 V to communicate with DDR3 SDRAM memory chip. By special request, modules can be supplied without DDR3 SDRAM chips. Contact Trenz Electronic support for details. On-board Power Rails GigaBee XC6SLX has the following power rails on-board.
  • Page 9 J1 (0.3 A) VCCO (1+3) 1.2V 3.3V ? switch VCCINT J1 (0.6 A) Ethernet VCCAUX 3.3V ? linear FPGA J2 (0.3 A) VCCCIO0 1.2, 1.5, 1.8, 2.5, 3.3 VCCO (0) J2 (0.9 A) Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 10: Power Supervision

    200 ms, the /RESET line returns to the inactive state (high) to allow a new system start-up. Copyright © 2017 Trenz Electronic GmbH Page...
  • Page 11: Power Fail

    These connectors are hermaphroditic. Odd pin numbers on the module are connected to even pin numbers on the baseboard and vice versa. Trenz Electronic 4 x 5 modules use two or three Samtec Razor Beam™ LSHM connectors on the bottom side.
  • Page 12: Connector Mechanical Ratings

    16 bit. DDR3 memory connected to FPGA bank 1 and FPGA bank 3. Spartan-6 Memory controller Blocks operations can be merged to implement effective 32-bit memory interface. Refer Xilinx XAPP496 detailed information. Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 13: Flash Memory

    Ethernet signals from PHY are connected to B2B connector J1. To use Ethernet in your design, GigaBee module should be connected to the carrier board, which have Ethernet magnetics and RJ45 connector. TE0603 carrier board can be used to access Ethernet capabilities of GigaBee XC6SLX series modules. Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 14: Oscillators

    DCM (DCM which use 125 MHz from PHY). The module also provides the footprint for custom 3.3 V single-ended oscillator (U12) which can be installed as an option (FPGA input pin Y13). Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 15: User Led

    FPGA pin V9 (label IO_L50N_2) undeclared in user constrains file (UCF) and set “unused IOB pins” to “float” in the Xilinx Project Navigator options, see Fig. below. (Project properties > Configuration options > Unused IOB Pins > Float). Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 16 In the alternate assembly, the /WDO (watchdog output) line is connected through zero-resistor R3 to /MR (master reset) line. Caution If alternate assembly is used, pin 18 of connector J2 must be left unconnected. Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 17: Configuration Options

    On TE0603 it can be done by connecting J5 pin 2 or J6 “VREF” (VCCAUX) to J1 any pin from 1,2,3,4 (3.3V). See Figure below. Program eFUSE using JTAG cable and iMPACT software. Remove power supply connections to VCCAUX Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 18: B2B Connectors Pin Descriptions

    Odd signals on module connect to even signals on baseboard. For example module signal 1 to baseboard signal 2, module signal 2 to baseboard signal 1, module signal 3 to baseboard signal 4 and so on. Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 19: Pin Types

    For example pins from FPGA bank with 1.5V VCCO (IOSTANDARD = LVCMOS15) can be used as inputs for 1.2V, 1.8V, 2.5V and 3.3V signals. See “Spartan-6 FPGA SelectIO Resources” page 38 for detailed information. Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 20: External Bank 2 Differential Clock Connection

    J1 pin-out J1 pin Type FPGA pin Net Length J1 pin Type FPGA pin Net Length 3.3V 3.3V PHY_MDI0_P 3.3V PHY_MDI0_N 3.3V 3.3V PHY_MDI1_P 3.3V PHY_MDI1_N 3.3V PHY_AVDD 3.3V PHY_MDI2_P PHY_L10 PHY_MDI2_N Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 21 AB15 12.37mm B2B_B2_L11_N 7.29mm B2B_B2_L15_P 14.20mm B2B_B2_L6_P 7.40mm B2B_B2_L15_N AB17 13.77mm B2B_B2_L6_N 6.94mm B2B_B2_L31_N AB12 12.30mm B2B_B2_L5_P 6.18mm SUSPEND 19.23mm B2B_B2_L5_N AB19 6.12mm VBATT CONFIG B2B_B2_L9_N 8.43mm CONFIG B2B_B2_L9_P 8.36mm RFUSE CONFIG Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 22: J2 Pin-Out

    6.19mm J2 Pin-out J2 Pin-out J2 pin Type FPGA pin Net Length J2 pin Type FPGA pin Net Length VCCIO0 3.3V VCCIO0 3.3V VCCIO0 3.3V VCCIO0 3.3V VCCIO0 3.3V B2B_PROGB CONFIG 3.3V Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 23 B2B_B0_L62_P 7.44mm B2B_B0_L38_N 8.38mm B2B_B0_L62_N 6.95mm B2B_B0_L38_P 9.87mm B2B_B0_L66_P 8.07mm B2B_B0_L50_N 7.66mm B2B_B0_L66_N 6.96mm B2B_B0_L50_P 8.87mm B2B_B1_L10_P 9.56mm B2B_B0_L51_N 10.22mm B2B_B1_L10_N 8.85mm B2B_B0_L51_P 10.67mm B2B_B1_L9_P 10.59mm B2B_B0_L63_N 7.95mm B2B_B1_L9_N 10.23mm B2B_B0_L63_P 9.12mm Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 24: Signal Integrity Considerations

    Traces of differential signals pairs are routed with a differential impedance between the two traces of 100 ohm. Single ended traces are routed with 60 ohm impedance. An electronic version of these pin-out tables are available for download from the Trenz Electronic support area of the web site.
  • Page 25: Module Revisions And Assembly Variants

    Module assembly variants coded by 4 zero ohm resistors, connected to FPGA AV[3:0] pins. All these pins should be configured to have internal PULLUP. Signal Speed SDRAM Temp Status FPGA pin grade grade TE0600-02[V|B] 2x128MBit obsolete TE0600-02[V|B]I 2x128MBit obsolete TE0600-02[V|B]F 2x128MBit obsolete TE0600-02[V|B]IF 2x128MBit obsolete TE0600-02[V|B]MF 2x512MBit obsolete Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 26 Speed SDRAM Temp Status FPGA pin grade grade TE0600-03[V|B] 2x128MBit full production TE0600-03[V|B]I 2x128MBit full production TE0600-03[V|B]F 2x128MBit full production TE0600-03[V|B]IF 2x128MBit full production TE0600-03[V|B]MF 2x512MBit full production Assembly variants pin coding Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 27: Related Materials And References

    Xilinx UG380: Spartan-6 FPGA Configuration User Guide This all-encompassing configuration guide includes chapters on configuration interfaces (serial and parallel), multi-bitstream management, bitstream encryption, boundary-scan and JTAG configuration, and reconfiguration techniques. http://www.xilinx.com/support/documentation/user_guides/ug380.pdf Xilinx UG381: Spartan-6 FPGA SelectIO Resources http://www.xilinx.com/support/documentation/user_guides/ug381.pdf Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 28: Design And Development Tools

    Xilinx ISE WebPACK http://www.xilinx.com/tools/webpack.htm http://www.xilinx.com/webpack/ Design Resources Trenz Electronic GigaBee Design Resources https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/TE0600 Trenz Electronic GigaBee Reference Designs https://github.com/Trenz-Electronic/ https://github.com/Trenz-Electronic/TE-EDK-IP/ https://github.com/Trenz-Electronic/TE060X-GigaBee-Reference-Designs/ Tutorials Xilinx UG695: ISE In-Depth Tutorial Chapter 8: Configuration Using iMPACT http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_1/ise_tutorial_ug695.pdf Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 29: Glossary Of Abbreviations And Acronyms

    5.0 mm and about 13 mm. GigaBee XC6SLX has 4 mounting holes, one in each corner. The module can be fixed by screwing M3 screws (ISO 262) onto a carrier board through those mounting holes. Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 30: Operating Temperature Ranges

    Industrial grade: -40°C to +85°C. The module operating temperature range depends also on customer design and cooling solution. Please contact us for options. Weight GigaBee XC6SLX weighs between 17.1 and 17.3 g with standard connectors. Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 31: Document Change History

    Changed Bank 1 power supply description and VCCIO0 sources description 2016-01-29 2.08 Pause advertise correction 2016-11-05 3.00 Document ported to wiki and adapted to web presentation. 2017-04-03 V3.02 Added REV03 to assembly Variant Table Copyright © 2017 Trenz Electronic GmbH Page http://www.trenz-electronic.de...
  • Page 32: Disclaimer

    Limitation of Liability In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents.
  • Page 33: Reach, Rohs And Weee

    (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no...

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