Sony CX-BK1 Service Manual page 74

CX-BK1
Pin No. Pin Name
46 IGEN
47 AVDD0
48 ASYO
49 ASYI
50 RFAC
51 AVSS1
52 CLTV
53 FILO
54 FILI
55 PCO
56 AVDD1
57 BIAS
58 VCTL
59 V16M
60 VPCO
61 DVDD2
62 ASYE
63 MD2
64 DOUT
65 LRCK
66 PCMD
67 BCLK
68 EMPH
69 XTSL
70 DVSS2
71 XTAI
72 XTAO
73 SOUT
74 SOCK
75 XOLT
76 SQSO
77 SQCK
78 SCSY
79 SBSO
80 EXCK
74
I/O
I
Stabilized current input for operational amplifiers
—
Power supply terminal (+3.3V) (analog system)
O
EFM full-swing output terminal
I Asymmetry comparator voltage input terminal
I
EFM signal input from the RF amplifier
—
Ground terminal (analog system)
I
Internal VCO control voltage input terminal
O Filter output for master PLL
I
Filter input for master PLL
O
Charge pump output for master PLL
—
Power supply terminal (+3.3V) (analog system)
I Asymmetry circuit constant current input terminal
I
VCO control voltage input terminal for the wideband EFM PLL Not used
O
VCO oscillation output terminal for the wideband EFM PLL Not used
O
Charge pump output terminal for the wideband EFM PLL Not used
— Power supply terminal (+3.3V) (digital system)
I
Asymmetry circuit on/off control signal input terminal "L": off, "H": on Not used
Digital out on/off control signal input terminal
I
"L": digital out off, "H": digital out on Fixed at "H" in this set
O
Digital audio signal output terminal
O
L/R sampling clock signal (44.1 kHz) output to the MP3 decoder
O
Serial data output to the MP3 decoder
O
Bit clock signal (2.8224 MHz) output to the MP3 decoder
"L" is output when playback disc is emphasis off
O
"H" is output when playback disc is emphasis on Not used
Input terminal for the system clock frequency setting
I
"L": 16.9344 MHz, "H": 33.8688MHz Fixed at "H" in this set
—
Ground terminal (digital system)
I System clock input terminal (33.8688 MHz)
O
System clock output terminal (33.8688 MHz) Not used
O
Serial data output terminal Not used
O
Serial data reading clock signal output terminal Not used
O
Serial data latch pulse signal output terminal Not used
O
Subcode Q data output to the system controller
I
Subcode Q data reading clock signal input from the system controller
I
Input terminal for resynchronism of guard subcode sync (S0+S1) Not used
O
Subcode serial data output terminal Not used
I
Subcode serial data reading clock signal input terminal Not used
Description