Texas Instruments AMIC110 User Manual
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Texas Instruments AMIC110 User Manual

Texas Instruments AMIC110 User Manual

Industrial communications engine
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This user's guide details the hardware architecture of the AMIC110 Industrial Communications Engine
(AMIC110 ICE). The AMIC110 is a Sitara™ AMIC110 ARM
(SoC).
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1
1.1
1.2
1.3
1.4
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
3
3.1
3.2
4
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
4.10
5
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Trademarks
Sitara, Texas Instruments, C2000, LaunchPad, BoosterPack, Code Composer Studio are trademarks of
Texas Instruments.
ARM, Cortex are registered trademarks of ARM Limited.
EtherCAT is a registered trademark of Beckhoff Automation GmbH.
Ethernet/IP is a trademark of ODVA, Inc.
All other trademarks are the property of their respective owners.
SPRUIE6 - April 2017
Submit Documentation Feedback
AMIC110 Industrial Communications Engine
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Copyright © 2017, Texas Instruments Incorporated
Cortex
®
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AMIC110 Industrial Communications Engine (AMIC110 ICE)
User's Guide
SPRUIE6 - April 2017
(AMIC110 ICE)
-A8 processor System-on-Chip
®
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Summary of Contents for Texas Instruments AMIC110

  • Page 1: Table Of Contents

    User's Guide SPRUIE6 – April 2017 AMIC110 Industrial Communications Engine (AMIC110 ICE) This user's guide details the hardware architecture of the AMIC110 Industrial Communications Engine (AMIC110 ICE). The AMIC110 is a Sitara™ AMIC110 ARM Cortex -A8 processor System-on-Chip ® ®...

  • Page 2: Introduction

    • 5-V input supply, single-chip power management IC (TPS650250) to power the entire board • AMIC110 can be configured to boot EtherCAT firmware from SPI Flash and also supports boot through the SPI host processor • No DDR or other external RAM required when the EtherCAT slave stack runs on an external host processor (such as the C2000™)

  • Page 3: Functional Block Diagram

    AMIC110 ICE. 1.3.1 Hardware Setup See the following steps to set up the hardware of the AMIC110 ICE. 1. Unbox the AMIC110 ICE and identify the components and connectors detailed in Section 2. Connect a 20-pin JTAG emulator to J1 on the AMIC110 ICE (see...
  • Page 4 Figure 2. AMIC110 ICE JTAG Connection 3. Connect the pin header connector of the TTL-232R-3V3 serial cable to J3 on the AMIC110 ICE (see Figure 3). Ensure that pin 1 of the serial cable (black wire, marked with a triangle) is connected to pin 1 of J3 (indicated by a dot on the silk screen).

  • Page 5: Power Supply

    J8 on the ICE board. To apply power to the AMIC110 ICE, insert the DC plug of the power supply into the AMIC110 ICE. Then, connect the AC plug of the power supply to the AC power source. Hot plugging the AMIC110 ICE (connecting the AC plug before the DC plug) may damage the board.
  • Page 6 Several Ethernet PHY1 (U3) signals are connected to AMIC110 pins that operate as SYSBOOT inputs. Two of the PHY1 signals must be isolated from AMIC110 SYSBOOT inputs during power on. A dual FET switch (U10) performs this task. The switch control inputs are connected to the MII1_RXD3 pin operating as GPIO2_18, which defaults to a high-z input with an internal pull-down after power is applied.

  • Page 7: Clock Distribution

    Clock Distribution Figure 5 shows the clock distribution circuit. Three 25-MHz crystals are used onboard. One 25-MHz crystal is connected to the AMIC110, the second crystal is connected to PHY1, and the third crystal is connected to PHY2. AMIC110 PHY1_TXCLK...

  • Page 8: Dp83822 - 10/100 Ethernet Phy

    The AMIC110 includes two PRU-ICSSs, which can be configured to support numerous industrial protocols. The PRU subsystem supports two IEEE 802.3 Standard Media Independent Interface (MII) interfaces, which can be connected to 10/100 Ethernet PHYs. The AMIC110 ICE includes two DP83822 10/100 Ethernet PHYs, which provide two Ethernet connections (see Figure 7).
  • Page 9 GPMC_WPn and GPMC_WAIT0 pins are configured to their respective GPIO mode with internal pull-up resistors turned on. Software should turn off internal pull resistors on all of these pins to prevent AMIC110 internal pull resistors from interfering with the bootstrapping of Ethernet PHY2 (U5).
  • Page 10 MII, 24-MHz reference clock MAC interface RX_DV RMII_EN RX_DV XI_50 LED_0 LED_CFG ON for good link, OFF for no link LED_1 LED_SPEED Tri-state condition AMIC110 Industrial Communications Engine (AMIC110 ICE) SPRUIE6 – April 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 11: Ethernet Protocol Specific Indicator Leds

    Figure 9. Industrial Ethernet PHY2 Strapping Resistors Ethernet Protocol Specific Indicator LEDs The AMIC110 ICE was built with a focus on EtherCAT. The indicator LEDs enable multiprotocol operation. The following protocols were chosen to be included for potential updates for other RT Ethernet protocols.
  • Page 12 – – – – Device is on – – – – Color – – – – – – – – Yellow AMIC110 Industrial Communications Engine (AMIC110 ICE) SPRUIE6 – April 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 13: Jtag Emulation Circuit

    PHY. Figure 10. AMIC110 ICE Indicator LEDs JTAG Emulation Circuit The AMIC110 ICE supports a compact TI 20-pin connector in the design. An external emulator and debugger pod, such as the XDS100 or the XDS200, may be connected to the 20-pin connector for JTAG connectivity.

  • Page 14: Memory Interfaces

    Memory Interfaces 2.7.1 DDR3 Interface The AMIC110 ICE supports one 4-Gb (256Mx16) DDR3 chip (MT41K256M16TW-107 from Micron) to obtain a memory size of 512MB. Figure 11 shows the DDR3 circuit. NOTE: No DDR or other external RAM is required when the EtherCAT slave stack runs on an external host processor (such as the C2000).
  • Page 15 0x12c | 0x000 | 0x096 | 0x12c DATA_PHY_WR_DQS_SLAVE_RATIO 0x070 | 0x003 | 0x039 | 0x06d DATA_PHY_WR_DATA_SLAVE_RATIO 0x0a8 | 0x03b | 0x071 | 0x06d ************************************************************** SPRUIE6 – April 2017 AMIC110 Industrial Communications Engine (AMIC110 ICE) Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
  • Page 16 2.7.3 SPI Flash The AMIC110 ICE includes an 8-MB serial Flash (W25Q64FV from Winbond) that is interfaced to the AMIC110 (see Figure 12). The SPI port of the ICE is shared with the SPI Flash and the LaunchPad that is selected through chip select SPI0_CS0 and SPI1_CS0.
  • Page 17 2.7.4 CAT24C256 EEPROM Board ID Memory The AMIC110 ICE is identified by its version and serial number, which are stored in the onboard EEPROM. The EEPROM is accessible on the address 0x50. The AMIC110 ICE includes a CAT24C256W I C EEPROM ID memory.

  • Page 18: Amic110 Ice Physical Specifications

    The ICE board has dimensions of 2.204 inches × 3.464 inches (56 mm × 88 mm), and is an 8-layer board fabricated with epoxy fiberglass FR4 grade material. Figure 13 shows the top view of the AMIC110 ICE. Figure 13. AMIC110 ICE (Top) AMIC110 Industrial Communications Engine (AMIC110 ICE) SPRUIE6 –...

  • Page 19: Connector Index

    AMIC110 board. Figure 14. AMIC110 ICE (Bottom) Connector Index The AMIC110 ICE has several connectors that provide access to various interfaces on the board; Table 6 lists these connectors. Table 6. AMIC110 ICE Connectors...
  • Page 20 Table 9. High Density Interface Connector Pinout Pin Number Description Pin Number Description Ground Ground EtherCAT ready signal Ground Chip-select signal; active low Ground AMIC110 Industrial Communications Engine (AMIC110 ICE) SPRUIE6 – April 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
  • Page 21 EtherCAT clock latch for PHY1 EtherCAT clock latch for PHY2 Data output for serial communication EtherCAT ready signal Data input for serial communication SPRUIE6 – April 2017 AMIC110 Industrial Communications Engine (AMIC110 ICE) Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 22: Power Supply

    Reset EtherCAT interrupt signal Power Supply The AMIC110 ICE can be powered from a single +5-V DC adapter. Do not hot plug the +5-V supply into the AMIC ICE; follow the instructions in Section 1.4 for plugging and unplugging the power supply. The +5-V input is converted into the required supply voltages using a PMIC.

  • Page 23: Power Distribution

    Sitara AMIC110 Current Consumption AM335x Power Consumption Summary was used for the worst-case estimates of the AMIC110 power requirements. The power requirements from the 3D Chameleon Man example were used because that was the example with the highest power consumption.

  • Page 24: Overall System Current Consumption

    Power Supply www.ti.com The glue logic is required to ensure the functionality of the AMIC110 boot sequence and to ensure that two outputs are not driving against each other at startup (the SN74LVC541AD buffer and SN74LVC2G66 dual switch provide this functionality).

  • Page 25: Measured Power Consumption Of System

    The total power dissipation of the TPS650250 is 0.6 W. Measured Power Consumption of System The measured power consumption test was performed while running the EtherCAT slave firmware on the AMIC110 ICE connected to a TwinCAT3 terminal on the PC. Table 18 lists the measured system power consumption.

  • Page 26: Thermal Test

    The power supply heats up to approximately 37°C (shown in Figure 16). The hottest spot on the board is the AMIC110 device, which has a temperature rise of 18.1°C. Power-Up Sequence Figure 17 shows the required power-up sequence for the processor.

  • Page 27: Power-Up Behavior Of Onboard Supply Rails

    1v1, 1v5, and 3v3 rails. Figure 18. Power-Up Sequence (Reset and 1v1, 1v5, and 3v3 Rails) SPRUIE6 – April 2017 AMIC110 Industrial Communications Engine (AMIC110 ICE) Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
  • Page 28 Thus, the 1v8 rails are denoted as 1v8_x in Figure 19 through Figure Figure 19. Power-Up Sequence (Reset and 1v5, 1v8_x, and 3v3 Rails) AMIC110 Industrial Communications Engine (AMIC110 ICE) SPRUIE6 – April 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 29: 4.10 Power-Down Behavior Of Onboard Supply Rails

    1v1, 1v8_x, and 3v3 rails. Figure 20. Power-Down Sequence (Reset and 1v1, 1v8_x, and 3v3 Rails) SPRUIE6 – April 2017 AMIC110 Industrial Communications Engine (AMIC110 ICE) Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 30: Known Issues

    1v5, 1v8_x, and 3v3 rails. Figure 21. Power-Down Sequence (Reset and 1v5, 1v8_x, and 3v3 Rails) Known Issues There are no known issues for the AMIC110 ICE. AMIC110 Industrial Communications Engine (AMIC110 ICE) SPRUIE6 – April 2017 Submit Documentation Feedback Copyright ©...

  • Page 31: Appendix A

    Two 2 × 10, 2.54-mm headers are provided to connect to LaunchPad boards. The following instructions detail connecting the AMIC110 ICE to the F28069M LaunchPad. 1. Insert the AMIC110 ICE headers (J4 and J5) to the F28069M LaunchPad headers (J1, J3, J2, and J4). Figure Figure 22.
  • Page 32 Connecting AMIC110 ICE to LaunchPad Devices www.ti.com Figure 24 shows the connected AMIC110 ICE and F28069M LaunchPad boards. Figure 24. Connected Devices SPRUIE6 – April 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
  • Page 33 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Date Revision Description April 2017 Initial release SPRUIE6 – April 2017 Revision History Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
  • Page 34 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...
  • Page 35 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments TMDXICE110-BTA TMDXICE110...

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