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Aries Embedded M100PFEVP Hardware Manual

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M100PFEVP Hardware Manual
Release 1
ARIES Embedded GmbH
October 17, 2019

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Summary of Contents for Aries Embedded M100PFEVP

  • Page 1 M100PFEVP Hardware Manual Release 1 ARIES Embedded GmbH October 17, 2019...

  • Page 3: Table Of Contents

    CONTENTS 1 About this manual Imprint ..........Disclaimer .

  • Page 5: About This Manual

    +49 (0) 8141/36 367-67 1.2 Disclaimer ARIES Embedded does not guarantee that the information in this document is up-to-date, correct, complete or of good quality. Liability claims against ARIES Embedded, referring to material or non-material related damages caused, due to usage or non-usage of the information given in this document, or due to usage of erroneous or incomplete information, are exempted, as long as there is no proven intentional or negligent fault of ARIES Embedded.

  • Page 6: Care And Maintenance

    M100PFEVP Hardware Manual, Release 1 1.5 Care and Maintenance • Keep the device dry. Precipitation, humidity, and all types of liquids or moisture can contain minerals that will corrode electronic circuits. If your device does get wet, allow it to dry completely.

  • Page 7: Overview

    CHAPTER OVERVIEW M100PFEVP represents the flexible Evaluation Platform for working with the M100PF SoM for PolarFire FPGAs. The system helps developers to have a smooth start with the M100PF SoMs, it can be used for designing IP, developing software as well as implementing prototypes.

  • Page 8: Block Diagram

    M100PFEVP Hardware Manual, Release 1 2.1 Block Diagram 2.2 Feature Set For supporting development projects and fast prototyping in the best possible way M100PFEVP supplies: • 2x Gigabit Ethernet on a RJ45 connector • USB on a mini-USB connector • 2x UART on a DUSB-9 connector each •...

  • Page 9: Dimensions

    M100PFEVP Hardware Manual, Release 1 2.3 Dimensions 2.3. Dimensions...

  • Page 10: Parts Location

    M100PFEVP Hardware Manual, Release 1 2.4 Parts Location The available functional blocks can be found on the baseboard as follows: 2.5 Handling Recommendations The populated Samtec connectors require certain mechanical force to insert the SoM into its mating baseboard con- nectors.

  • Page 11: Resources

    RESOURCES 3.1 Ethernet M100PFEVP offers two Ethernet Ports in RGMII mode to be controlled by the PolarFire FPGA. These ports can be ac- cessed via the RJ45 connectors P500 and P600 supported by Microchip KSZ903 Ethernet physical-layer transceivers. 3.2 UART Two UARTs are available on a RS232 signal level.

  • Page 12: Can

    M100PFEVP Hardware Manual, Release 1 3.4 CAN Two CAN ports are available on M100PFEVP. The signals on the DSUB connector can optionally be terminated by 120 Ohms. This is done by setting the jumpers at position P19 and P20. Function...

  • Page 13: Hsmc Connector (J2)

    – – 3.3V – – – – 3.3V 3.7 HSMC Connector (J2) M100PFEVP hosts a High Speed Mezzanine Card (HSMC) connector. Its pinout is shown in the following table. Function Connector FPGA pin FPGA pin Connector Function – – –...
  • Page 14 M100PFEVP Hardware Manual, Release 1 Table 3.1 – continued from previous page Function Connector FPGA pin FPGA pin Connector Function GXB_TX_L3_N P2-18 P2-12 GXB_RX_L3_N – – – – GXB_TX_L2_P P2-39 P2-33 GXB_RX_L2_P GXB_TX_L2_N P2-41 P2-35 GXB_RX_L2_N – – – –...
  • Page 15 M100PFEVP Hardware Manual, Release 1 Table 3.1 – continued from previous page Function Connector FPGA pin FPGA pin Connector Function 3.3V – – – – IOB4A58 P1-101 – – P1-102 IOB4A24 IOB4A59 P1-99 – – P1-100 IOB4A25 3.3V – –...

  • Page 16: Samtec Connector

    M100PFEVP Hardware Manual, Release 1 3.8 Samtec Connector The M100PF SoM connects to the M100PFEVP Baseboard using two Samtec QSH-090-01-F-D-A connectors. 3.8.1 Connector P1 Function FPGA Pin FPGA Pin Function 3.3V – 3.3V – JTAG_TDO 3.3V – JTAG_TCK 3.3V –...
  • Page 17 M100PFEVP Hardware Manual, Release 1 Table 3.2 – continued from previous page Function FPGA Pin FPGA Pin Function 3.3V (*) – – 3.3V (*) HSMC 141 (*) – – HSMC 75 (*) HSMC 139 (*) – – HSMC 73 (*) HSMC 135 (*) –...
  • Page 18 M100PFEVP Hardware Manual, Release 1 Table 3.2 – continued from previous page Function FPGA Pin FPGA Pin Function Ground Plate – – Ground Plate Ground Plate – – Ground Plate Ground Plate – – Ground Plate Ground Plate – –...
  • Page 19 M100PFEVP Hardware Manual, Release 1 Table 3.3 – continued from previous page Function FPGA Pin FPGA Pin Function – – – – – – Pmod J4 4 Pmod J4 10 – – – – – – 3.3V – – 3.3V 1.8V (*)
  • Page 20 M100PFEVP Hardware Manual, Release 1 Table 3.3 – continued from previous page Function FPGA Pin FPGA Pin Function PIC_SDA – – CLKEXT_P (*) PIC_SCL – – CLKEXT_N (*) IDT_SEL0 – – 2.5V (*) IDT_SEL1 – CLKEXTF IDT_SEL2 – – CLK25_3 3.3V...

  • Page 21: Appendix

    CHAPTER FOUR APPENDIX 4.1 Schematics...
  • Page 22 M100PFEVP Hardware Manual, Release 1 Chapter 4. Appendix...
  • Page 23 M100PFEVP Hardware Manual, Release 1 4.1. Schematics...
  • Page 24 M100PFEVP Hardware Manual, Release 1 Chapter 4. Appendix...
  • Page 25 M100PFEVP Hardware Manual, Release 1 4.1. Schematics...
  • Page 26 M100PFEVP Hardware Manual, Release 1 Chapter 4. Appendix...
  • Page 27 M100PFEVP Hardware Manual, Release 1 4.1. Schematics...
  • Page 28 M100PFEVP Hardware Manual, Release 1 Chapter 4. Appendix...
  • Page 29 M100PFEVP Hardware Manual, Release 1 4.1. Schematics...
  • Page 30 M100PFEVP Hardware Manual, Release 1 Chapter 4. Appendix...

  • Page 31: Layout Diagram

    M100PFEVP Hardware Manual, Release 1 4.2 Layout Diagram CAN2 CAN1 UART2 UART1 4.2. Layout Diagram...

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