Demux-By-2 Example With 20 Gb/S Data Input With Full Rate Clock - Agilent Technologies N4968A User Manual

Clock and data demultiplexer 44 gb/s
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4.4 Demux-by-2 Example with 20 Gb/s Data Input with Full Rate Clock

Clock and Data Demultiplexer 44 Gb/s User Guide
This Manual:http://www.manuallib.com/agilent/n4968a-demultiplexer-user-guide.html
1. Configuration:
Data input = 20 Gb/s
Clock input = 20 GHz
Data output = 2 x 10 Gb/s
Clock output = 10 GHz
2. Loop A to Clk2 (provides 20 GHz full-rate clock to Demux).
3. Loop E to F.
4. Set Divider 2 to ½.
5. Set Divider 3 and 4 to 1 (provides 10 GHz clock output).
Figure 6. Demux-by-2 example with 20 Gb/s data input
The divide ratio of the divided clock outputs 1 and 2 are the divide ratio of the
divider 2 times the divide ratio of the divider 4. Similarly the divide ratio of the
divided clock outputs 3 and 4 are the divide ratio of the divider 2 times the
divide ratio of the divider 3.
The inputs and the outputs of the dividers are differential and the unused
inputs and outputs should be terminated with 50 Ω terminators.
The Data In and Data In/ are differential inputs for the data. These connectors
are 1.85 mm female connectors. If the data input is used single ended the
input should be connected through a DC block and the unused input should
be terminated with a 50 Ω 1.85 mm terminator.
Operation
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