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Operation
4.2 Block Diagram
20
This Manual:http://www.manuallib.com/agilent/n4968a-demultiplexer-user-guide.html
The block diagram is shown in Figure 3.
Figure 3. N4968A block diagram
The N4968A Clock and Data Demultiplexer consists of a 1:4 demultiplexer
module + 4 clock divider and can be used in either 1:4 demux mode with a half
rate clock input, or in 1:2 demux mode (up to 22 Gb/s max data rate) with a full
rate clock input.
The clock divider ratios can be set to match the output (de-multiplexed) data
rate for sending to external equipment such as a bit error ratio tester, or
sampling scope.
Refer to the configuration examples below for setup details in various
applications.
Clock and Data Demultiplexer 44 Gb/s User Guide
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