EN 48
8.
Q543.3E LA
8. IC Data Sheets
This chapter shows the internal block diagrams and pin
configurations of ICs that are drawn as "black boxes" in the
8.1
Diagram
SSB: DC/DC +3V3 +1V2
Block Diagram
8.6 V
7.8 V
IS+1
IS−1
−
70 mV
IS+2
IS−2
−
70 mV
Pin Configuration
2010-Jun-29
IC Data Sheets
B01A, NCP5422AD (IC 7103)
V
R
CC
OSC
BIAS
V
CC
−
+
−
+
−
FAULT
S
Q
Set
Dominant
−
R
+
0.25 V
−
E/A OFF
5.0 A
E/A1
1.0 V
V
COMP1
FB1
1
GATE(H)1
GATE(L)1
GND
BST
IS+1
IS−1
V
FB1
COMP1
A
= Assembly Location
WL
= Wafer Lot
Y
= Year
WW = Work Week
Figure 8-1 Internal block diagram and pin configuration
electrical diagrams (with the exception of "memory" and "logic"
ICs).
CURRENT
SOURCE
GEN
CLK1
OSC
CLK2
S
Reset
Dominant
FAULT
PWM
Comparator 1
R
RAMP1
0.425 V
−
S
+
Reset
Dominant
FAULT
PWM
Comparator 2
R
RAMP2
E/A OFF
0.425 V
1.2 mA
−
+
−
E/A2
1.0 V
V
COMP2
FB2
SO−16
16
GATE(H)2
GATE(L)2
V
CC
R
OSC
IS+2
IS−2
V
FB2
COMP2
RAMP1
RAMP2
BST
BST
GATE(H)1
non−overlap
V
CC
GATE(L)1
FAULT
BST
GATE(H)2
non−overlap
V
CC
GATE(L)2
FAULT
GND
FAULT
F_15400_129.eps
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