Subscribe to Our Youtube Channel
Related Manuals for Texas Instruments TMS320DM35 Series
Summary of Contents for Texas Instruments TMS320DM35 Series
- Page 1 TMS320DM35x Digital Media System-on-Chip (DMSoC) Pulse-Width Modulator (PWM) Reference Guide Literature Number: SPRUEE7A May 2006 – Revised September 2007...
- Page 2 SPRUEE7A – May 2006 – Revised September 2007 Submit Documentation Feedback...
-
Page 3: Table Of Contents
Contents ..........................Preface ........................ Introduction ..................Purpose of the Peripheral ......................Features ..............Industry Standard(s) Compliance Statement ....................Peripheral Architecture ..................... Clock Control ....................Signal Descriptions ................... Functional Operation ..................Reset Considerations ...................... Initialization ....................Interrupt Support ..................EDMA Event Support .................... - Page 4 List of Figures ............. PWM Waveform Polarity Control (PWM_RPT = 2, for 3 periods) ....PWM One-Shot Mode Operation (P1OUT = 1, INACTOUT = 0, EVTRIG = 0, PWM_RPT = 2) PWM Event-Triggered One-Shot Mode Operation (P1OUT = 1, INACTOUT = 0, EVTRIG = 1, ......................
-
Page 5: Preface
– Reserved bits in a register figure designate a bit that is used for future device expansion. TMS320DM355 Digital Media System-on-Chip (DMSoC) Related Documentation From Texas Instruments The following documents describe the TMS320DM355 Digital Media System-on-Chip (DMSoC). Copies of these documents are available on the internet at www.ti.com. Contact your TI representative for Extranet access. - Page 6 www.ti.com TMS320DM355 Digital Media System-on-Chip (DMSoC) SPRUED4— TMS320DM35x DMSoC Serial Peripheral Interface (SPI) Reference Guide This document describes the serial peripheral interface (SPI) in the TMS320DM35x Digital Media System-on-Chip (DMSoC). The SPI is a high-speed synchronous serial input/output port that allows a serial bit stream of programmed length (1 to 16 bits) to be shifted into and out of the device at a programmed bit-transfer rate.
- Page 7 www.ti.com TMS320DM355 Digital Media System-on-Chip (DMSoC) SPRUF71— TMS320DM35x DMSoC Video Processing Front End (VPFE) Users Guide This document describes the Video Processing Front End (VPFE) in the TMS320DM35x Digital Media System-on-Chip (DMSoC). SPRUF72— TMS320DM35x DMSoC Video Processing Back End (VPBE) Users Guide This document describes the Video Processing Back End (VPBE) in the TMS320DM35x Digital Media System-on-Chip (DMSoC).
-
Page 8: Introduction
Reference Guide SPRUEE7A – May 2006 – Revised September 2007 Pulse-Width Modulator (PWM) Peripheral Introduction This document describes the pulse-width modulator (PWM) peripheral in the TMS320DM35x Digital Media System-on-Chip (DMSoC). Purpose of the Peripheral The pulse width modulator (PWM) feature is very common in embedded systems. It provides a way to generate a pulse periodic waveform for motor control or can act as a digital-to-analog converter with some external components. -
Page 9: Peripheral Architecture
www.ti.com Peripheral Architecture Peripheral Architecture Clock Control The PWM peripheral is driven by the auxiliary clock of the PLL controller. The frequency of the auxiliary clock is equal to the input reference clock of the PLL controller, and therefore is not affected by the multiplier and divider values of the PLL controller. -
Page 10: Functional Operation
www.ti.com Peripheral Architecture Functional Operation The PWM module can operate in either one-shot or continuous mode. In both modes, the PWM peripheral has a first-phase duration register (PH1D) and a period register (PER) to specify, respectively, the first-phase duration and period of the waveform. The first-phase output level can be configured to be either high or low in the P1OUT bit of the PWM configuration register (CFG) and the second phase output is automatically the opposite polarity of the first-phase level. -
Page 11: Pwm Event-Triggered One-Shot Mode Operation
www.ti.com Peripheral Architecture The PWM is stopped from the event-triggered one-shot mode operation by changing the MODE bit to 0 (disable). When the PWM is disabled, the output is immediately driven to the configured inactive state. Figure 3. PWM Event-Triggered One-Shot Mode Operation (P1OUT = 1, INACTOUT = 0, EVTRIG = 1, PWM_RPT = 1) Configure Write... -
Page 12: Reset Considerations
www.ti.com Peripheral Architecture Figure 4. PWM Continuous Mode Operation (P1OUT = 1, INACTOUT = 0, EVTRIG = 1, PWM_RPT = 0) START PERa PERb Configure to one−shot P1Da P1Db P1Da P1Db P1Db PWM output PERa+1 PERb+1 PERb+1 Interrupt Period/P1D not changed, previous values applied Reset Considerations... -
Page 13: Edma Event Support
www.ti.com Peripheral Architecture When the PWM is configured in continuous mode and the interrupt bit (INTEN) in the PWM configuration register (CFG) is enabled, the PWM peripheral generates an interrupt every period after the first-phase duration register and period register values have been copied to the associated shadow registers. This event indicates it is safe to program the duration values for the next period. -
Page 14: Registers
www.ti.com Registers Registers Table 1 lists the memory-mapped registers for the pulse-width modulator (PWM) controller. See the device-specific data manual for the memory addresses of these registers. Table 1. Pulse Width Modulator (PWM) Registers Offset Acronym Register Description Section PWM Peripheral Identification Register Section 3.1 PWM Peripheral Control Register Section 3.2... -
Page 15: Pulse Width Modulator (Pwm) Configuration Register (Cfg)
www.ti.com Registers Figure 6. Pulse Width Modulator (PWM) Peripheral Control Register (PCR) Reserved Reserved FREE R/W-0 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 3. Pulse Width Modulator (PWM) Peripheral Control Register (PCR) Field Descriptions Field Value Description... -
Page 16: Pulse Width Modulator (Pwm) Start Register (Start)
www.ti.com Registers Table 4. Pulse Width Modulator (PWM) Configuration Register (CFG) Field Descriptions (continued) Field Value Description P1OUT First-phase output level. High EVTRIG 0-3h Event trigger. Disable Positive edge triggered Negative edge triggered Reserved MODE 0-3h Operating mode. Disable One shot mode Continuous mode Reserved Pulse Width Modulator (PWM) Start Register (START) -
Page 17: Pulse Width Modulator (Pwm) Period Register (Per)
www.ti.com Registers Figure 9. Pulse Width Modulator (PWM) Repeat Count Register (RPT) Reserved Reserved R/W-0 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 6. Pulse Width Modulator (PWM) Repeat Count Register (RPT) Field Descriptions Field Value Description... -
Page 18: Pulse Width Modulator (Pwm) First-Phase Duration Register (Ph1D) Field Descriptions
www.ti.com Registers Table 8. Pulse Width Modulator (PWM) First-Phase Duration Register (PH1D) Field Descriptions Field Value Description 31-0 PH1D 0-FFFF FFFFh First-phase duration is PH1D clock cycles. Pulse-Width Modulator (PWM) Peripheral SPRUEE7A – May 2006 – Revised September 2007 Submit Documentation Feedback... - Page 19 TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products...
Need help?
Do you have a question about the TMS320DM35 Series and is the answer not in the manual?
Questions and answers