Sun Microsystems Netra CP2000 Series Programming Manual page 109

Slot 5's BDSEL# signal is asserted after the HSIOC_SETHASIG ioctl() is executed,
as follows:
arg.bdsel = 0xf7
arg.healthy = 0xff
arg.reset = 0
ioctl(cphscfd, HSIOC_SETHASIG, &arg)
Use the HSIOC_GETHASIG ioctl() to poll the HA signals until slot 5 asserts a
HEALTHY# signal. The condition to wait for is:
(arg.healthy & (1 << (slot -2))) == 0
When the healthy bit is clear, the board in this slot is powered on and is ready to
be taken out of reset.
The HSIOC_SETHASIG ioctl() sets both the bdsel and the reset bit-vectors. For
slots that are to remain powered off, their bdsel bit should be set to 1. In this
example, slot 5 is the only slot powered on, so the bit-vector should be:
arg.bdsel = 0xf7
To de-assert reset for slot 5, set the reset bit-vector to:
arg.reset = 0x8
Executing the HSIOC_SETHASIG ioctl() with the following arg takes the board
out of reset and causes the board to generate an ENUM# signal if it has hot-swap
friendly silicon:
ioctl(cphscfd, HSIOC_SETHASIG, &arg)
The Solaris hot-swap framework recognizes this ENUM# signal, which in this case
indicates that the board has been freshly inserted, and then configures the board.
Use the cfgadm command at a Solaris command prompt to verify that this slot has
been successfully configured.
Chapter 5 Programming Netra CP2100 Series Board Controlled Devices 93